Lines Matching refs:hw
32 * @hw: pointer to hardware structure
39 static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)
42 hw->adapter_stopped = false;
49 * @hw: pointer to hardware structure
54 static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)
56 s32 status = hw->mac.ops.start_hw(hw);
58 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
65 * @hw: pointer to hardware structure
70 static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)
72 struct ixgbe_mbx_info *mbx = &hw->mbx;
79 hw->mac.ops.stop_adapter(hw);
81 IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
82 IXGBE_WRITE_FLUSH(hw);
85 while (!mbx->ops.check_for_rst(hw) && timeout) {
97 mbx->ops.write_posted(hw, msgbuf, 1);
104 ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);
111 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
112 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
119 * @hw: pointer to hardware structure
126 static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)
136 hw->adapter_stopped = true;
139 number_of_queues = hw->mac.max_rx_queues;
141 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
144 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
148 IXGBE_WRITE_FLUSH(hw);
151 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
154 IXGBE_READ_REG(hw, IXGBE_VTEICR);
157 number_of_queues = hw->mac.max_tx_queues;
159 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
162 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
171 * @hw: pointer to hardware structure
181 static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
185 switch (hw->mac.mc_filter_type) {
209 * @hw: pointer to the HW structure
212 static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
214 memcpy(mac_addr, hw->mac.perm_addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
221 * @hw: pointer to hardware structure
226 static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
229 struct ixgbe_mbx_info *mbx = &hw->mbx;
237 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
240 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
247 ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);
254 * @hw: pointer to the HW structure
259 static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw,
263 struct ixgbe_mbx_info *mbx = &hw->mbx;
287 vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr);
290 mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE);
297 * @hw: pointer to the HW structure
302 static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
305 struct ixgbe_mbx_info *mbx = &hw->mbx;
313 return mbx->ops.write_posted(hw, msgbuf, 2);
318 * @hw: pointer to hardware structure
326 static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,
335 * @hw: pointer to hardware structure
342 static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,
349 if (!(hw->mbx.ops.check_for_rst(hw))) {
355 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);