Lines Matching refs:hw
95 struct ixgbe_hw *hw = &adapter->hw;
104 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
229 struct ixgbe_hw *hw = &adapter->hw;
236 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
239 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_VFCTRL);
240 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_VFSTATUS);
241 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
242 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_VFRXMEMWRAP);
243 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_VFRTIMER);
248 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_VTEICS);
249 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_VTEICS);
250 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_VTEIMS);
251 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_VTEIMC);
252 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_VTEIAC);
253 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_VTEIAM);
254 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_VTEITR(0));
255 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_VTIVAR(0));
256 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
260 regs_buff[14 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDBAL(i));
262 regs_buff[16 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDBAH(i));
264 regs_buff[18 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDLEN(i));
266 regs_buff[20 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDH(i));
268 regs_buff[22 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDT(i));
270 regs_buff[24 + i] = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
272 regs_buff[26 + i] = IXGBE_READ_REG(hw, IXGBE_VFSRRCTL(i));
275 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_VFPSRTYPE);
279 regs_buff[29 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDBAL(i));
281 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDBAH(i));
283 regs_buff[33 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDLEN(i));
285 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDH(i));
287 regs_buff[37 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDT(i));
289 regs_buff[39 + i] = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
291 regs_buff[41 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDWBAL(i));
293 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDWBAH(i));
296 hw_dbg(hw, "%s\t%8.8x\n", ixgbevf_reg_names[i], regs_buff[i]);
503 struct ixgbe_hw *hw = &adapter->hw;
508 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
560 before = readl(adapter->hw.hw_addr + R); \
561 writel((_test[pat] & W), (adapter->hw.hw_addr + R)); \
562 val = readl(adapter->hw.hw_addr + R); \
564 hw_dbg(&adapter->hw, \
569 writel(before, adapter->hw.hw_addr + R); \
572 writel(before, adapter->hw.hw_addr + R); \
579 before = readl(adapter->hw.hw_addr + R); \
580 writel((W & M), (adapter->hw.hw_addr + R)); \
581 val = readl(adapter->hw.hw_addr + R); \
586 writel(before, (adapter->hw.hw_addr + R)); \
589 writel(before, (adapter->hw.hw_addr + R)); \
618 (adapter->hw.hw_addr + test->reg)
655 hw_dbg(&adapter->hw, "offline testing starting\n");
668 hw_dbg(&adapter->hw, "register testing starting\n");
678 hw_dbg(&adapter->hw, "online testing starting\n");