Lines Matching refs:hw
147 struct ixgbe_hw *hw = &adapter->hw;
158 gcr = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
160 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr);
161 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
163 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
166 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
168 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
221 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
230 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
234 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
238 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
242 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
246 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
250 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
254 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
258 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
262 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
266 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
270 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
274 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
278 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
282 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
286 IXGBE_READ_REG(hw, reginfo->ofs));
306 struct ixgbe_hw *hw = &adapter->hw;
339 ixgbe_regdump(hw, reginfo);
524 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
525 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
534 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
535 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
551 struct ixgbe_hw *hw = &adapter->hw;
552 switch (hw->mac.type) {
558 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
561 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
568 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
571 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
577 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
580 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
593 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
595 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
598 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
600 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
650 switch (adapter->hw.mac.type) {
681 return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff;
688 struct ixgbe_hw *hw = &adapter->hw;
708 IXGBE_READ_REG(hw, tx_ring->head),
709 IXGBE_READ_REG(hw, tx_ring->tail),
842 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
843 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
846 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
856 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
868 struct ixgbe_hw *hw = &adapter->hw;
871 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
872 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q));
876 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl);
877 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
878 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q));
883 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl);
898 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
931 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
973 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1008 (adapter->hw.mac.type == ixgbe_mac_82599EB))
1019 static inline void ixgbe_release_rx_desc(struct ixgbe_hw *hw,
1029 IXGBE_WRITE_REG(hw, IXGBE_RDT(rx_ring->reg_idx), val);
1112 ixgbe_release_rx_desc(&adapter->hw, rx_ring, i);
1138 * This function changes a queue full of hw rsc buffers into a completed
1435 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
1438 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
1440 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
1450 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
1531 struct ixgbe_hw *hw = &adapter->hw;
1535 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1538 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1554 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
1631 struct ixgbe_hw *hw = &adapter->hw;
1635 switch (hw->device_id) {
1640 if (hw->mac.ops.check_link)
1641 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
1646 if (hw->phy.ops.check_overtemp(hw) == IXGBE_ERR_OVERTEMP)
1660 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0);
1666 struct ixgbe_hw *hw = &adapter->hw;
1672 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1678 struct ixgbe_hw *hw = &adapter->hw;
1682 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1686 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
1696 struct ixgbe_hw *hw = &adapter->hw;
1702 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
1703 IXGBE_WRITE_FLUSH(hw);
1712 struct ixgbe_hw *hw = &adapter->hw;
1715 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
1716 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
1724 if (hw->mac.type == ixgbe_mac_82598EB)
1727 if (hw->mac.type == ixgbe_mac_82599EB) {
1737 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_FLOW_DIR);
1750 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
1760 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1762 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1765 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(0), mask);
1767 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1), mask);
1777 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1779 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, mask);
1782 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), mask);
1784 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), mask);
2236 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
2247 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2249 IXGBE_WRITE_FLUSH(&adapter->hw);
2253 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2266 struct ixgbe_hw *hw = &adapter->hw;
2270 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2274 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2286 if (hw->mac.type == ixgbe_mac_82599EB)
2377 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2378 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2380 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2381 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2382 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2384 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
2386 IXGBE_WRITE_FLUSH(&adapter->hw);
2402 struct ixgbe_hw *hw = &adapter->hw;
2404 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
2413 e_info(hw, "Legacy interrupt IVAR setup done\n");
2425 struct ixgbe_hw *hw = &adapter->hw;
2434 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
2436 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
2437 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
2438 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
2439 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
2446 switch (hw->mac.type) {
2448 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
2452 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j));
2456 switch (hw->mac.type) {
2458 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
2462 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl);
2467 if (hw->mac.type == ixgbe_mac_82599EB) {
2472 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2474 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2481 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2487 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2492 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB);
2498 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2512 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2517 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
2538 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
2546 if (!(adapter->hw.mac.type == ixgbe_mac_82599EB))
2583 struct ixgbe_hw *hw = &adapter->hw;
2591 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j));
2616 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(j), rscctrl);
2628 struct ixgbe_hw *hw = &adapter->hw;
2651 if (hw->mac.type == ixgbe_mac_82599EB)
2657 if (hw->mac.type == ixgbe_mac_82599EB) {
2664 IXGBE_WRITE_REG(hw,
2676 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2680 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
2682 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
2691 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
2695 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2696 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2706 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_BIT_MASK(32)));
2707 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
2708 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
2709 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
2710 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
2736 if (hw->mac.type == ixgbe_mac_82598EB) {
2747 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2749 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2755 u32 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
2760 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl | vt_reg_bits);
2761 IXGBE_WRITE_REG(hw, IXGBE_MRQC, 0);
2765 IXGBE_WRITE_REG(hw, IXGBE_VFRE(0), 0);
2766 IXGBE_WRITE_REG(hw, IXGBE_VFRE(1), 0);
2767 IXGBE_WRITE_REG(hw, IXGBE_VFTE(0), 0);
2768 IXGBE_WRITE_REG(hw, IXGBE_VFTE(1), 0);
2770 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (1 << vf_shift));
2771 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (1 << vf_shift));
2772 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
2773 ixgbe_set_vmolr(hw, adapter->num_vfs, true);
2788 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
2793 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
2795 if (hw->mac.type == ixgbe_mac_82598EB)
2803 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2810 hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
2814 reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
2816 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, reg);
2819 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2833 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
2835 if (hw->mac.type == ixgbe_mac_82599EB) {
2836 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2839 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2848 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
2849 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
2856 struct ixgbe_hw *hw = &adapter->hw;
2860 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, true);
2866 struct ixgbe_hw *hw = &adapter->hw;
2878 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
2882 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
2887 struct ixgbe_hw *hw = &adapter->hw;
2888 u32 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2891 switch (hw->mac.type) {
2899 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2904 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2911 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2913 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
2922 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
2927 struct ixgbe_hw *hw = &adapter->hw;
2928 u32 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2931 switch (hw->mac.type) {
2935 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2940 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2943 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2945 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3001 struct ixgbe_hw *hw = &adapter->hw;
3003 unsigned int rar_entries = hw->mac.num_rar_entries - (vfn + 1);
3013 if (!hw->mac.ops.set_rar)
3019 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3026 hw->mac.ops.clear_rar(hw, rar_entries);
3043 struct ixgbe_hw *hw = &adapter->hw;
3049 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3055 hw->addr_ctrl.user_set_promisc = true;
3070 hw->mac.ops.update_mc_addr_list(hw, netdev);
3074 hw->addr_ctrl.user_set_promisc = false;
3089 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
3092 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
3095 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3152 struct ixgbe_hw *hw = &adapter->hw;
3161 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
3165 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3167 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
3172 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
3179 struct ixgbe_hw *hw = &adapter->hw;
3187 if (hw->mac.type == ixgbe_mac_82598EB)
3208 ixgbe_init_fdir_signature_82599(hw, adapter->fdir_pballoc);
3210 ixgbe_init_fdir_perfect_82599(hw, adapter->fdir_pballoc);
3220 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3222 switch (hw->phy.type) {
3243 struct ixgbe_hw *hw = &adapter->hw;
3245 if (hw->phy.multispeed_fiber) {
3255 hw->mac.ops.setup_sfp(hw);
3271 * @hw: pointer to private hardware struct
3275 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
3281 if (hw->mac.ops.check_link)
3282 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3287 if (hw->mac.ops.get_link_capabilities)
3288 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
3292 if (hw->mac.ops.setup_link)
3293 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
3306 if (IXGBE_READ_REG(&adapter->hw,
3316 ixgbe_release_rx_desc(&adapter->hw, adapter->rx_ring[rxr],
3323 struct ixgbe_hw *hw = &adapter->hw;
3349 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3357 switch (hw->mac.type) {
3359 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3363 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3364 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3370 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3375 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
3377 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3382 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
3384 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3387 if (hw->mac.type == ixgbe_mac_82599EB) {
3388 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
3391 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3401 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3406 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3411 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3419 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
3422 if (hw->mac.type == ixgbe_mac_82599EB) {
3424 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3426 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3430 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3432 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
3433 if (hw->mac.type == ixgbe_mac_82599EB) {
3438 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3448 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3454 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
3455 if (hw->mac.type == ixgbe_mac_82599EB)
3459 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3460 if (hw->mac.type == ixgbe_mac_82598EB)
3464 hw->mac.ops.enable_rx_dma(hw, rxdctl);
3472 if (hw->phy.multispeed_fiber)
3473 hw->mac.ops.enable_tx_laser(hw);
3479 IXGBE_READ_REG(hw, IXGBE_EICR);
3488 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
3501 if (hw->phy.type == ixgbe_phy_unknown) {
3502 err = hw->phy.ops.identify(hw);
3514 if (ixgbe_is_sfp(hw)) {
3517 err = ixgbe_non_sfp_link_config(hw);
3536 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
3538 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
3571 struct ixgbe_hw *hw = &adapter->hw;
3574 err = hw->mac.ops.init_hw(hw);
3596 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
3663 writel(0, adapter->hw.hw_addr + rx_ring->head);
3665 writel(0, adapter->hw.hw_addr + rx_ring->tail);
3697 writel(0, adapter->hw.hw_addr + tx_ring->head);
3699 writel(0, adapter->hw.hw_addr + tx_ring->tail);
3729 struct ixgbe_hw *hw = &adapter->hw;
3751 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3752 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3754 IXGBE_WRITE_FLUSH(hw);
3781 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3782 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
3786 if (hw->mac.type == ixgbe_mac_82599EB)
3787 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
3788 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
3792 if (hw->phy.multispeed_fiber)
3793 hw->mac.ops.disable_tx_laser(hw);
4091 netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev,
4148 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
4155 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
4439 struct ixgbe_hw *hw = &adapter->hw;
4454 * hw.mac->max_msix_vectors vectors. With features
4459 v_budget = min(v_budget, (int)hw->mac.max_msix_vectors);
4489 netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev,
4692 struct ixgbe_hw *hw = &adapter->hw;
4694 if ((hw->phy.type == ixgbe_phy_nl) &&
4695 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
4696 s32 ret = hw->phy.ops.identify_sfp(hw);
4699 ret = hw->phy.ops.reset(hw);
4707 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
4729 struct ixgbe_hw *hw = &adapter->hw;
4740 hw->vendor_id = pdev->vendor;
4741 hw->device_id = pdev->device;
4742 hw->revision_id = pdev->revision;
4743 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4744 hw->subsystem_device_id = pdev->subsystem_device;
4751 if (hw->mac.type == ixgbe_mac_82598EB) {
4752 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4755 } else if (hw->mac.type == ixgbe_mac_82599EB) {
4759 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4808 hw->fc.requested_mode = ixgbe_fc_full;
4809 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
4811 adapter->last_lfc_mode = hw->fc.current_mode;
4813 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
4814 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
4815 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4816 hw->fc.send_xon = true;
4817 hw->fc.disable_fc_autoneg = false;
4834 if (ixgbe_init_eeprom_params_generic(hw)) {
5210 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5228 struct ixgbe_hw *hw = &adapter->hw;
5255 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5257 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5260 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5262 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5264 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5266 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5267 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5270 if (wufc && hw->mac.type == ixgbe_mac_82599EB)
5326 struct ixgbe_hw *hw = &adapter->hw;
5340 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5358 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5361 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5365 if (hw->mac.type == ixgbe_mac_82598EB)
5366 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5367 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5368 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5369 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5370 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5371 if (hw->mac.type == ixgbe_mac_82599EB) {
5372 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
5374 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
5376 adapter->stats.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5378 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
5380 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
5383 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
5385 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
5388 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5392 if (hw->mac.type == ixgbe_mac_82599EB) {
5394 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5395 tmp = IXGBE_READ_REG(hw, IXGBE_GORCH) & 0xF; /* 4 high bits of GORC */
5397 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5398 tmp = IXGBE_READ_REG(hw, IXGBE_GOTCH) & 0xF; /* 4 high bits of GOTC */
5400 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5401 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5402 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5403 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
5404 adapter->stats.fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5405 adapter->stats.fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5407 adapter->stats.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5408 adapter->stats.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5409 adapter->stats.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5410 adapter->stats.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5411 adapter->stats.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5412 adapter->stats.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5415 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5416 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
5417 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5418 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5419 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5421 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5423 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5424 if (hw->mac.type == ixgbe_mac_82598EB)
5426 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5427 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5428 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5429 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5430 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5431 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5432 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5433 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5434 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5436 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5438 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5439 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5440 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5448 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5449 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5450 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5451 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5452 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5454 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5455 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5456 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5457 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5458 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5459 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5480 struct ixgbe_hw *hw = &adapter->hw;
5498 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5530 struct ixgbe_hw *hw = &adapter->hw;
5535 autoneg = hw->phy.autoneg_advertised;
5536 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
5537 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
5538 hw->mac.autotry_restart = false;
5539 if (hw->mac.ops.setup_link)
5540 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
5554 struct ixgbe_hw *hw = &adapter->hw;
5561 err = hw->phy.ops.identify_sfp(hw);
5571 hw->mac.ops.setup_sfp(hw);
5588 struct ixgbe_hw *hw = &adapter->hw;
5591 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5615 struct ixgbe_hw *hw = &adapter->hw;
5628 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
5633 hw->mac.ops.fc_enable(hw, i);
5635 hw->mac.ops.fc_enable(hw, 0);
5638 hw->mac.ops.fc_enable(hw, 0);
5646 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
5656 if (hw->mac.type == ixgbe_mac_82599EB) {
5657 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5658 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
5662 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5663 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6061 writel(i, adapter->hw.hw_addr + tx_ring->tail);
6108 ixgbe_fdir_add_signature_filter_82599(&adapter->hw, &atr_input, queue);
6311 struct ixgbe_hw *hw = &adapter->hw;
6318 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
6320 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
6330 struct ixgbe_hw *hw = &adapter->hw;
6334 if (prtad != hw->phy.mdio.prtad)
6336 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6346 struct ixgbe_hw *hw = &adapter->hw;
6348 if (prtad != hw->phy.mdio.prtad)
6350 return hw->phy.ops.write_reg(hw, addr, devad, value);
6357 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6371 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6392 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6466 struct ixgbe_hw *hw = &adapter->hw;
6469 if (hw->mac.type != ixgbe_mac_82599EB || !max_vfs)
6494 ixgbe_init_mbx_params_pf(hw);
6495 memcpy(&hw->mbx.ops, ii->mbx_ops,
6496 sizeof(hw->mbx.ops));
6531 struct ixgbe_hw *hw;
6607 hw = &adapter->hw;
6608 hw->back = adapter;
6611 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
6613 if (!hw->hw_addr) {
6630 /* Setup hw api */
6631 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
6632 hw->mac.type = ii->mac;
6635 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
6636 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
6639 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
6642 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
6643 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
6645 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
6646 hw->phy.mdio.mmds = 0;
6647 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
6648 hw->phy.mdio.dev = netdev;
6649 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
6650 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
6668 ii->get_invariants(hw);
6676 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
6677 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6684 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
6690 hw->phy.reset_if_overtemp = true;
6691 err = hw->mac.ops.reset_hw(hw);
6692 hw->phy.reset_if_overtemp = false;
6694 hw->mac.type == ixgbe_mac_82598EB) {
6728 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
6749 if (hw->mac.ops.get_device_caps) {
6750 hw->mac.ops.get_device_caps(hw, &device_caps);
6768 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
6774 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
6775 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
6784 if (hw->phy.multispeed_fiber)
6785 hw->mac.ops.disable_tx_laser(hw);
6810 hw->mac.ops.get_bus_info(hw);
6814 ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s":
6815 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5Gb/s":"Unknown"),
6816 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" :
6817 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" :
6818 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" :
6821 ixgbe_read_pba_num_generic(hw, &part_num);
6822 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
6825 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
6829 hw->mac.type, hw->phy.type,
6832 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
6840 hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
6843 err = hw->mac.ops.start_hw(hw);
6899 iounmap(hw->hw_addr);
6946 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
6969 iounmap(adapter->hw.hw_addr);
7033 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
7143 struct net_device *ixgbe_get_hw_dev(struct ixgbe_hw *hw)
7145 struct ixgbe_adapter *adapter = hw->back;