Lines Matching defs:eecd_reg
49 * eecd_reg - EECD's current value
53 u32 *eecd_reg)
58 *eecd_reg = *eecd_reg | IXGB_EECD_SK;
59 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
67 * eecd_reg - EECD's current value
71 u32 *eecd_reg)
76 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK;
77 IXGB_WRITE_REG(hw, EECD, *eecd_reg);
93 u32 eecd_reg;
101 eecd_reg = IXGB_READ_REG(hw, EECD);
102 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
109 eecd_reg &= ~IXGB_EECD_DI;
112 eecd_reg |= IXGB_EECD_DI;
114 IXGB_WRITE_REG(hw, EECD, eecd_reg);
118 ixgb_raise_clock(hw, &eecd_reg);
119 ixgb_lower_clock(hw, &eecd_reg);
126 eecd_reg &= ~IXGB_EECD_DI;
127 IXGB_WRITE_REG(hw, EECD, eecd_reg);
138 u32 eecd_reg;
149 eecd_reg = IXGB_READ_REG(hw, EECD);
151 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI);
156 ixgb_raise_clock(hw, &eecd_reg);
158 eecd_reg = IXGB_READ_REG(hw, EECD);
160 eecd_reg &= ~(IXGB_EECD_DI);
161 if (eecd_reg & IXGB_EECD_DO)
164 ixgb_lower_clock(hw, &eecd_reg);
181 u32 eecd_reg;
183 eecd_reg = IXGB_READ_REG(hw, EECD);
186 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI);
187 IXGB_WRITE_REG(hw, EECD, eecd_reg);
190 eecd_reg |= IXGB_EECD_CS;
191 IXGB_WRITE_REG(hw, EECD, eecd_reg);
202 u32 eecd_reg;
204 eecd_reg = IXGB_READ_REG(hw, EECD);
207 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK);
208 IXGB_WRITE_REG(hw, EECD, eecd_reg);
212 eecd_reg |= IXGB_EECD_SK;
213 IXGB_WRITE_REG(hw, EECD, eecd_reg);
217 eecd_reg |= IXGB_EECD_CS;
218 IXGB_WRITE_REG(hw, EECD, eecd_reg);
222 eecd_reg &= ~IXGB_EECD_SK;
223 IXGB_WRITE_REG(hw, EECD, eecd_reg);
235 u32 eecd_reg;
237 eecd_reg = IXGB_READ_REG(hw, EECD);
240 eecd_reg |= IXGB_EECD_SK;
241 IXGB_WRITE_REG(hw, EECD, eecd_reg);
245 eecd_reg &= ~IXGB_EECD_SK;
246 IXGB_WRITE_REG(hw, EECD, eecd_reg);
258 u32 eecd_reg;
260 eecd_reg = IXGB_READ_REG(hw, EECD);
262 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI);
264 IXGB_WRITE_REG(hw, EECD, eecd_reg);
283 u32 eecd_reg;
296 eecd_reg = IXGB_READ_REG(hw, EECD);
298 if (eecd_reg & IXGB_EECD_DO)