Lines Matching refs:ioc3
30 #define IOC3_NAME "ioc3-eth"
66 #include <asm/sn/ioc3.h>
80 struct ioc3 *regs;
170 * to the IOC3's memory mapped registers is expected as struct ioc3 * ioc3
173 #define ioc3_r_mcr() be32_to_cpu(ioc3->mcr)
174 #define ioc3_w_mcr(v) do { ioc3->mcr = cpu_to_be32(v); } while (0)
175 #define ioc3_w_gpcr_s(v) do { ioc3->gpcr_s = cpu_to_be32(v); } while (0)
176 #define ioc3_r_emcr() be32_to_cpu(ioc3->emcr)
177 #define ioc3_w_emcr(v) do { ioc3->emcr = cpu_to_be32(v); } while (0)
178 #define ioc3_r_eisr() be32_to_cpu(ioc3->eisr)
179 #define ioc3_w_eisr(v) do { ioc3->eisr = cpu_to_be32(v); } while (0)
180 #define ioc3_r_eier() be32_to_cpu(ioc3->eier)
181 #define ioc3_w_eier(v) do { ioc3->eier = cpu_to_be32(v); } while (0)
182 #define ioc3_r_ercsr() be32_to_cpu(ioc3->ercsr)
183 #define ioc3_w_ercsr(v) do { ioc3->ercsr = cpu_to_be32(v); } while (0)
184 #define ioc3_r_erbr_h() be32_to_cpu(ioc3->erbr_h)
185 #define ioc3_w_erbr_h(v) do { ioc3->erbr_h = cpu_to_be32(v); } while (0)
186 #define ioc3_r_erbr_l() be32_to_cpu(ioc3->erbr_l)
187 #define ioc3_w_erbr_l(v) do { ioc3->erbr_l = cpu_to_be32(v); } while (0)
188 #define ioc3_r_erbar() be32_to_cpu(ioc3->erbar)
189 #define ioc3_w_erbar(v) do { ioc3->erbar = cpu_to_be32(v); } while (0)
190 #define ioc3_r_ercir() be32_to_cpu(ioc3->ercir)
191 #define ioc3_w_ercir(v) do { ioc3->ercir = cpu_to_be32(v); } while (0)
192 #define ioc3_r_erpir() be32_to_cpu(ioc3->erpir)
193 #define ioc3_w_erpir(v) do { ioc3->erpir = cpu_to_be32(v); } while (0)
194 #define ioc3_r_ertr() be32_to_cpu(ioc3->ertr)
195 #define ioc3_w_ertr(v) do { ioc3->ertr = cpu_to_be32(v); } while (0)
196 #define ioc3_r_etcsr() be32_to_cpu(ioc3->etcsr)
197 #define ioc3_w_etcsr(v) do { ioc3->etcsr = cpu_to_be32(v); } while (0)
198 #define ioc3_r_ersr() be32_to_cpu(ioc3->ersr)
199 #define ioc3_w_ersr(v) do { ioc3->ersr = cpu_to_be32(v); } while (0)
200 #define ioc3_r_etcdc() be32_to_cpu(ioc3->etcdc)
201 #define ioc3_w_etcdc(v) do { ioc3->etcdc = cpu_to_be32(v); } while (0)
202 #define ioc3_r_ebir() be32_to_cpu(ioc3->ebir)
203 #define ioc3_w_ebir(v) do { ioc3->ebir = cpu_to_be32(v); } while (0)
204 #define ioc3_r_etbr_h() be32_to_cpu(ioc3->etbr_h)
205 #define ioc3_w_etbr_h(v) do { ioc3->etbr_h = cpu_to_be32(v); } while (0)
206 #define ioc3_r_etbr_l() be32_to_cpu(ioc3->etbr_l)
207 #define ioc3_w_etbr_l(v) do { ioc3->etbr_l = cpu_to_be32(v); } while (0)
208 #define ioc3_r_etcir() be32_to_cpu(ioc3->etcir)
209 #define ioc3_w_etcir(v) do { ioc3->etcir = cpu_to_be32(v); } while (0)
210 #define ioc3_r_etpir() be32_to_cpu(ioc3->etpir)
211 #define ioc3_w_etpir(v) do { ioc3->etpir = cpu_to_be32(v); } while (0)
212 #define ioc3_r_emar_h() be32_to_cpu(ioc3->emar_h)
213 #define ioc3_w_emar_h(v) do { ioc3->emar_h = cpu_to_be32(v); } while (0)
214 #define ioc3_r_emar_l() be32_to_cpu(ioc3->emar_l)
215 #define ioc3_w_emar_l(v) do { ioc3->emar_l = cpu_to_be32(v); } while (0)
216 #define ioc3_r_ehar_h() be32_to_cpu(ioc3->ehar_h)
217 #define ioc3_w_ehar_h(v) do { ioc3->ehar_h = cpu_to_be32(v); } while (0)
218 #define ioc3_r_ehar_l() be32_to_cpu(ioc3->ehar_l)
219 #define ioc3_w_ehar_l(v) do { ioc3->ehar_l = cpu_to_be32(v); } while (0)
220 #define ioc3_r_micr() be32_to_cpu(ioc3->micr)
221 #define ioc3_w_micr(v) do { ioc3->micr = cpu_to_be32(v); } while (0)
222 #define ioc3_r_midr_r() be32_to_cpu(ioc3->midr_r)
223 #define ioc3_w_midr_r(v) do { ioc3->midr_r = cpu_to_be32(v); } while (0)
224 #define ioc3_r_midr_w() be32_to_cpu(ioc3->midr_w)
225 #define ioc3_w_midr_w(v) do { ioc3->midr_w = cpu_to_be32(v); } while (0)
232 static int nic_wait(struct ioc3 *ioc3)
243 static int nic_reset(struct ioc3 *ioc3)
248 presence = nic_wait(ioc3);
251 nic_wait(ioc3);
256 static inline int nic_read_bit(struct ioc3 *ioc3)
261 result = nic_wait(ioc3);
263 nic_wait(ioc3);
268 static inline void nic_write_bit(struct ioc3 *ioc3, int bit)
275 nic_wait(ioc3);
281 static u32 nic_read_byte(struct ioc3 *ioc3)
287 result = (result >> 1) | (nic_read_bit(ioc3) << 7);
295 static void nic_write_byte(struct ioc3 *ioc3, int byte)
303 nic_write_bit(ioc3, bit);
307 static u64 nic_find(struct ioc3 *ioc3, int *last)
312 nic_reset(ioc3);
314 nic_write_byte(ioc3, 0xf0);
318 a = nic_read_bit(ioc3);
319 b = nic_read_bit(ioc3);
335 nic_write_bit(ioc3, address & (1UL << index));
342 nic_write_bit(ioc3, a);
352 static int nic_init(struct ioc3 *ioc3)
362 reg = nic_find(ioc3, &save);
376 nic_reset(ioc3);
379 nic_write_byte(ioc3, 0x55);
381 nic_write_byte(ioc3, (reg >> (i << 3)) & 0xff);
406 struct ioc3 *ioc3 = ip->regs;
414 if (!nic_init(ioc3))
425 nic_write_byte(ioc3, 0xf0);
426 nic_write_byte(ioc3, 0x00);
427 nic_write_byte(ioc3, 0x00);
430 nic[i] = nic_read_byte(ioc3);
451 struct ioc3 *ioc3 = ip->regs;
479 struct ioc3 *ioc3 = ip->regs;
491 struct ioc3 *ioc3 = ip->regs;
504 struct ioc3 *ioc3 = ip->regs;
582 struct ioc3 *ioc3 = ip->regs;
659 struct ioc3 *ioc3 = ip->regs;
738 struct ioc3 *ioc3 = ip->regs;
762 struct ioc3 *ioc3 = ip->regs;
949 struct ioc3 *ioc3 = ip->regs;
979 struct ioc3 *ioc3 = ip->regs;
980 volatile u32 *ssram0 = &ioc3->ssram[0x0000];
981 volatile u32 *ssram1 = &ioc3->ssram[0x4000];
1002 struct ioc3 *ioc3 = ip->regs;
1039 struct ioc3 *ioc3 = ip->regs;
1122 * addresses on a partitioned machine. Since we currently use the ioc3
1124 * driver uses for pci/pnp ports (there is an entry for the SGI ioc3
1127 * port 0. So, we just use one serial port from each ioc3 (since the
1137 * around ioc3 oddities in this respect.
1172 static void __devinit ioc3_serial_probe(struct pci_dev *pdev, struct ioc3 *ioc3)
1190 ioc3->gpcr_s = GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL;
1191 ioc3->gpcr_s;
1192 ioc3->gppr_6 = 0;
1193 ioc3->gppr_6;
1194 ioc3->gppr_7 = 0;
1195 ioc3->gppr_7;
1196 ioc3->sscr_a = ioc3->sscr_a & ~SSCR_DMA_EN;
1197 ioc3->sscr_a;
1198 ioc3->sscr_b = ioc3->sscr_b & ~SSCR_DMA_EN;
1199 ioc3->sscr_b;
1201 ioc3->sio_iec &= ~ (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL |
1205 ioc3->sio_iec |= SIO_IR_SA_INT;
1206 ioc3->sscr_a = 0;
1207 ioc3->sio_iec &= ~ (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL |
1211 ioc3->sio_iec |= SIO_IR_SB_INT;
1212 ioc3->sscr_b = 0;
1214 ioc3_8250_register(&ioc3->sregs.uarta);
1215 ioc3_8250_register(&ioc3->sregs.uartb);
1238 struct ioc3 *ioc3;
1275 err = pci_request_regions(pdev, "ioc3");
1287 ioc3 = (struct ioc3 *) ioremap(ioc3_base, ioc3_size);
1288 if (!ioc3) {
1294 ip->regs = ioc3;
1297 ioc3_serial_probe(pdev, ioc3);
1317 printk(KERN_CRIT "ioc3-eth(%s): Didn't find a PHY, goodbye.\n",
1374 struct ioc3 *ioc3 = ip->regs;
1379 iounmap(ioc3);
1395 .name = "ioc3-eth",
1415 struct ioc3 *ioc3 = ip->regs;
1670 struct ioc3 *ioc3 = ip->regs;