Lines Matching refs:wr32
850 wr32(E1000_CTRL_EXT, tmp);
864 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
872 wr32(E1000_IVAR_MISC, tmp);
1041 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1284 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1285 wr32(E1000_EIMC, adapter->eims_enable_mask);
1287 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1290 wr32(E1000_IAM, 0);
1291 wr32(E1000_IMC, ~0);
1313 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1315 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1316 wr32(E1000_EIMS, adapter->eims_enable_mask);
1318 wr32(E1000_MBVFIMR, 0xFF);
1324 wr32(E1000_IMS, ims);
1326 wr32(E1000_IMS, IMS_ENABLE_MASK |
1328 wr32(E1000_IAM, IMS_ENABLE_MASK |
1371 wr32(E1000_CTRL_EXT,
1391 wr32(E1000_CTRL_EXT,
1482 wr32(E1000_CTRL_EXT, reg_data);
1507 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1515 wr32(E1000_TCTL, tctl);
1590 wr32(E1000_PBA, pba);
1627 wr32(E1000_PBA, pba);
1655 wr32(E1000_VFRE, 0);
1656 wr32(E1000_VFTE, 0);
1661 wr32(E1000_WUC, 0);
1668 wr32(E1000_PCIEMISC,
1677 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2055 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2076 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2168 wr32(E1000_TSAUXC, 0x80000000);
2172 wr32(E1000_SYSTIMR, 0x00000000);
2173 wr32(E1000_SYSTIML, 0x80000000);
2174 wr32(E1000_SYSTIMH, 0x000000FF);
2178 wr32(E1000_TSAUXC, 0x0);
2215 wr32(E1000_TIMINCA,
2220 wr32(E1000_SYSTIML, 0x00000000);
2221 wr32(E1000_SYSTIMH, 0xFF800000);
2367 wr32(E1000_CTRL_EXT, reg_data);
2496 wr32(E1000_TXDCTL(0), 0);
2509 wr32(E1000_TCTL, tctl);
2529 wr32(E1000_TXDCTL(reg_idx),
2534 wr32(E1000_TDLEN(reg_idx),
2536 wr32(E1000_TDBAL(reg_idx),
2538 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2550 wr32(E1000_TXDCTL(reg_idx), txdctl);
2695 wr32(E1000_RETA(j >> 2), reta.dword);
2711 wr32(E1000_RXCSUM, rxcsum);
2724 wr32(E1000_VT_CTL, vtctl);
2746 wr32(E1000_MRQC, mrqc);
2780 wr32(E1000_RXDCTL(0), 0);
2788 wr32(E1000_QDE, ALL_QUEUES);
2791 wr32(E1000_RCTL, rctl);
2809 wr32(E1000_VMOLR(vfn), vmolr);
2836 wr32(E1000_RLPML, max_frame_size);
2871 wr32(E1000_VMOLR(vfn), vmolr);
2891 wr32(E1000_RXDCTL(reg_idx),
2895 wr32(E1000_RDBAL(reg_idx),
2897 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
2898 wr32(E1000_RDLEN(reg_idx),
2930 wr32(E1000_SRRCTL(reg_idx), srrctl);
2942 wr32(E1000_RXDCTL(reg_idx), rxdctl);
3273 wr32(E1000_RAH(rar_entries), 0);
3274 wr32(E1000_RAL(rar_entries), 0);
3337 wr32(E1000_RCTL, rctl);
3344 wr32(E1000_VMOLR(vfn), vmolr);
3500 wr32(E1000_EICS, eics);
3502 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4188 wr32(E1000_EICS,
4485 wr32(E1000_IMS, E1000_IMS_LSC |
4489 wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC);
4490 wr32(E1000_EIMS, adapter->eims_other);
4549 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
4565 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
4581 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
4616 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
4679 wr32(E1000_VMOLR(vf), vmolr);
4737 wr32(E1000_VMOLR(i), vmolr);
4764 wr32(E1000_VLVF(i), reg);
4815 wr32(E1000_VLVF(i), reg);
4828 wr32(E1000_VMOLR(vf), reg);
4843 wr32(E1000_VLVF(i), reg);
4857 wr32(E1000_VMOLR(vf), reg);
4869 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
4871 wr32(E1000_VMVIR(vf), 0);
4973 wr32(E1000_VFTE, reg | (1 << vf));
4975 wr32(E1000_VFRE, reg | (1 << vf));
5229 wr32(E1000_EIMS, q_vector->eims_value);
5909 wr32(E1000_TSYNCTXCTL, regval);
5915 wr32(E1000_TSYNCRXCTL, regval);
5918 wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
5922 wr32(E1000_ETQF(3),
5927 wr32(E1000_ETQF(3), 0);
5938 wr32(E1000_IMIR(3), htons(PTP_PORT));
5939 wr32(E1000_IMIREXT(3),
5943 wr32(E1000_SPQF(3), htons(PTP_PORT));
5946 wr32(E1000_FTQF(3), ftqf);
5948 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
6024 wr32(E1000_CTRL, ctrl);
6029 wr32(E1000_RCTL, rctl);
6034 wr32(E1000_CTRL, ctrl);
6159 wr32(E1000_RCTL, rctl);
6168 wr32(E1000_CTRL, ctrl);
6173 wr32(E1000_WUC, E1000_WUC_PME_EN);
6174 wr32(E1000_WUFC, wufc);
6176 wr32(E1000_WUC, 0);
6177 wr32(E1000_WUFC, 0);
6248 wr32(E1000_WUS, ~0);
6295 wr32(E1000_EIMC, q_vector->eims_value);
6356 wr32(E1000_WUS, ~0);
6418 wr32(E1000_RAL(index), rar_low);
6420 wr32(E1000_RAH(index), rar_high);
6490 wr32(E1000_DTXCTL, reg);
6495 wr32(E1000_RPLOLR, reg);