Lines Matching defs:bc
147 static inline void baycom_int_freq(struct baycom_state *bc)
154 bc->debug_vals.cur_intcnt++;
155 if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
156 bc->debug_vals.last_jiffies = cur_jiffies;
157 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
158 bc->debug_vals.cur_intcnt = 0;
159 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
160 bc->debug_vals.cur_pllcorr = 0;
196 #define SER12_ARB_DIVIDER(bc) (bc->opt_dcd ? 24 : 36)
198 #define SER12_DCD_INTERVAL(bc) (bc->opt_dcd ? 12 : 240)
200 static inline void ser12_tx(struct net_device *dev, struct baycom_state *bc)
208 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr));
209 if (bc->modem.shreg <= 1)
210 bc->modem.shreg = 0x10000 | hdlcdrv_getbits(&bc->hdrv);
211 bc->modem.ser12.tx_bit = !(bc->modem.ser12.tx_bit ^
212 (bc->modem.shreg & 1));
213 bc->modem.shreg >>= 1;
218 static inline void ser12_rx(struct net_device *dev, struct baycom_state *bc)
225 hdlcdrv_channelbit(&bc->hdrv, cur_s);
226 bc->modem.ser12.dcd_shreg = (bc->modem.ser12.dcd_shreg << 1) |
227 (cur_s != bc->modem.ser12.last_sample);
228 bc->modem.ser12.last_sample = cur_s;
229 if(bc->modem.ser12.dcd_shreg & 1) {
230 if (!bc->opt_dcd) {
234 dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
235 if (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
237 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
238 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
239 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
241 bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
243 bc->modem.ser12.dcd_sum0--;
245 if(!bc->modem.ser12.dcd_time) {
246 hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
247 bc->modem.ser12.dcd_sum1 +
248 bc->modem.ser12.dcd_sum2) < 0);
249 bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
250 bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
252 bc->modem.ser12.dcd_sum0 = 2;
253 bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
255 bc->modem.ser12.dcd_time--;
256 if (!bc->opt_dcd) {
260 if (bc->modem.ser12.interm_sample) {
269 switch (bc->modem.ser12.dcd_shreg & 7) {
273 bc->debug_vals.cur_pllcorr++;
279 bc->debug_vals.cur_pllcorr--;
286 bc->modem.shreg >>= 1;
287 if (bc->modem.ser12.last_sample ==
288 bc->modem.ser12.last_rxbit)
289 bc->modem.shreg |= 0x10000;
290 bc->modem.ser12.last_rxbit =
291 bc->modem.ser12.last_sample;
293 if (++bc->modem.ser12.interm_sample >= 3)
294 bc->modem.ser12.interm_sample = 0;
298 if (bc->modem.ser12.dcd_shreg & 1) {
302 dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
303 dcdspos += (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
305 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
306 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
307 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
309 bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
315 if (bc->modem.ser12.interm_sample) {
324 switch (bc->modem.ser12.dcd_shreg & 3) {
328 bc->debug_vals.cur_pllcorr++;
334 bc->debug_vals.cur_pllcorr--;
341 bc->modem.shreg >>= 1;
342 if (bc->modem.ser12.last_sample ==
343 bc->modem.ser12.last_rxbit)
344 bc->modem.shreg |= 0x10000;
345 bc->modem.ser12.last_rxbit =
346 bc->modem.ser12.last_sample;
348 bc->modem.ser12.interm_sample = !bc->modem.ser12.interm_sample;
352 bc->modem.ser12.dcd_sum0 -= (bc->modem.ser12.dcd_shreg & 1);
355 if (bc->modem.shreg & 1) {
356 hdlcdrv_putbits(&bc->hdrv, bc->modem.shreg >> 1);
357 bc->modem.shreg = 0x10000;
359 if(!bc->modem.ser12.dcd_time) {
360 if (bc->opt_dcd & 1)
361 hdlcdrv_setdcd(&bc->hdrv, !((inb(MSR(dev->base_addr)) ^ bc->opt_dcd) & 0x80));
363 hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
364 bc->modem.ser12.dcd_sum1 +
365 bc->modem.ser12.dcd_sum2) < 0);
366 bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
367 bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
369 bc->modem.ser12.dcd_sum0 = 2;
370 bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
372 bc->modem.ser12.dcd_time--;
380 struct baycom_state *bc = netdev_priv(dev);
383 if (!dev || !bc || bc->hdrv.magic != HDLCDRV_MAGIC)
388 baycom_int_freq(bc);
403 if (hdlcdrv_ptt(&bc->hdrv))
404 ser12_tx(dev, bc);
406 ser12_rx(dev, bc);
407 bc->modem.arb_divider--;
418 if (bc->modem.arb_divider <= 0) {
419 bc->modem.arb_divider = SER12_ARB_DIVIDER(bc);
421 hdlcdrv_arbitrate(dev, &bc->hdrv);
424 hdlcdrv_transmitter(dev, &bc->hdrv);
425 hdlcdrv_receiver(dev, &bc->hdrv);
473 struct baycom_state *bc = netdev_priv(dev);
476 if (!dev || !bc)
483 memset(&bc->modem, 0, sizeof(bc->modem));
484 bc->hdrv.par.bitrate = 1200;
506 ser12_set_divisor(dev, bc->opt_dcd ? 6 : 4);
516 struct baycom_state *bc = netdev_priv(dev);
518 if (!dev || !bc)
554 static int baycom_setmode(struct baycom_state *bc, const char *modestr)
557 bc->opt_dcd = 0;
559 bc->opt_dcd = -1;
561 bc->opt_dcd = -2;
563 bc->opt_dcd = 1;
572 struct baycom_state *bc;
578 bc = netdev_priv(dev);
579 BUG_ON(bc->hdrv.magic != HDLCDRV_MAGIC);
589 if (bc->opt_dcd <= 0)
590 strcat(hi->data.modename, (!bc->opt_dcd) ? "*" : (bc->opt_dcd == -2) ? "@" : "+");
599 return baycom_setmode(bc, hi->data.modename);
620 bi.data.dbg.debug1 = bc->hdrv.ptt_keyed;
621 bi.data.dbg.debug2 = bc->debug_vals.last_intcnt;
622 bi.data.dbg.debug3 = bc->debug_vals.last_pllcorr;
666 struct baycom_state *bc;
682 bc = netdev_priv(dev);
683 if (set_hw && baycom_setmode(bc, mode[i]))