Lines Matching refs:irqmask
769 u32 irqmask;
1078 /* In MSIX mode, a write to irqmask behaves as XOR */
3408 if (np->irqmask != NVREG_IRQMASK_CPU) {
3409 np->irqmask = NVREG_IRQMASK_CPU;
3418 if (np->irqmask != NVREG_IRQMASK_THROUGHPUT) {
3419 np->irqmask = NVREG_IRQMASK_THROUGHPUT;
3444 if (!(np->events & np->irqmask))
3483 if (!(np->events & np->irqmask))
3515 if (!(events & np->irqmask))
3595 np->nic_poll_irq = np->irqmask;
3609 writel(np->irqmask, base + NvRegIrqMask);
3629 if (!(events & np->irqmask))
3676 if (!(events & np->irqmask))
3762 static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask)
3773 if ((irqmask >> i) & 0x1) {
3781 if ((irqmask >> (i + 8)) & 0x1) {
3932 mask = np->irqmask;
4946 nv_disable_hw_interrupts(dev, np->irqmask);
5001 nv_enable_hw_interrupts(dev, np->irqmask);
5259 nv_disable_hw_interrupts(dev, np->irqmask);
5270 nv_enable_hw_interrupts(dev, np->irqmask);
5339 nv_disable_hw_interrupts(dev, np->irqmask);
5658 /* msix has had reported issues when modifying irqmask
5664 np->irqmask = NVREG_IRQMASK_CPU;
5670 np->irqmask = NVREG_IRQMASK_THROUGHPUT;
5675 np->irqmask = NVREG_IRQMASK_THROUGHPUT;
5681 np->irqmask |= NVREG_IRQ_TIMER;