Lines Matching refs:hw
46 * @hw: pointer to the HW structure
52 s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw)
54 struct e1000_mac_info *mac = &hw->mac;
55 struct e1000_bus_info *bus = &hw->bus;
56 struct e1000_adapter *adapter = hw->adapter;
71 mac->ops.set_lan_id(hw);
79 * @hw: pointer to the HW structure
84 void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw)
86 struct e1000_bus_info *bus = &hw->bus;
99 * @hw: pointer to the HW structure
103 void e1000_set_lan_id_single_port(struct e1000_hw *hw)
105 struct e1000_bus_info *bus = &hw->bus;
112 * @hw: pointer to the HW structure
117 void e1000_clear_vfta_generic(struct e1000_hw *hw)
122 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0);
129 * @hw: pointer to the HW structure
136 void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
138 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);
144 * @hw: pointer to the HW structure
151 void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
159 e1000e_rar_set(hw, hw->mac.addr, 0);
164 e1000e_rar_set(hw, mac_addr, i);
169 * @hw: pointer to the HW structure
179 s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)
186 ret_val = e1000_read_nvm(hw, NVM_COMPAT, 1, &nvm_data);
192 (hw->adapter->pdev->device == E1000_DEV_ID_82571EB_SERDES_DUAL) ||
193 (hw->adapter->pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)))
196 ret_val = e1000_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1,
208 if (hw->bus.func == E1000_FUNC_1)
212 ret_val = e1000_read_nvm(hw, offset, 1, &nvm_data);
233 e1000e_rar_set(hw, alt_mac_addr, 0);
241 * @hw: pointer to the HW structure
248 void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
279 * @hw: pointer to the HW structure
286 static u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
292 hash_mask = (hw->mac.mta_reg_count * 32) - 1;
327 switch (hw->mac.mc_filter_type) {
350 * @hw: pointer to the HW structure
357 void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
364 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));
368 hash_value = e1000_hash_mc_addr(hw, mc_addr_list);
370 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
373 hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit);
378 for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)
379 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]);
385 * @hw: pointer to the HW structure
389 void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw)
432 * @hw: pointer to the HW structure
438 s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
440 struct e1000_mac_info *mac = &hw->mac;
458 ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
471 e1000e_check_downshift(hw);
487 e1000e_config_collision_dist(hw);
495 ret_val = e1000e_config_fc_after_link_up(hw);
505 * @hw: pointer to the HW structure
510 s32 e1000e_check_for_fiber_link(struct e1000_hw *hw)
512 struct e1000_mac_info *mac = &hw->mac;
548 ret_val = e1000e_config_fc_after_link_up(hw);
572 * @hw: pointer to the HW structure
577 s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
579 struct e1000_mac_info *mac = &hw->mac;
613 ret_val = e1000e_config_fc_after_link_up(hw);
681 * @hw: pointer to the HW structure
686 static s32 e1000_set_default_fc_generic(struct e1000_hw *hw)
697 * control setting, then the variable hw->fc will
700 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data);
708 hw->fc.requested_mode = e1000_fc_none;
711 hw->fc.requested_mode = e1000_fc_tx_pause;
713 hw->fc.requested_mode = e1000_fc_full;
720 * @hw: pointer to the HW structure
728 s32 e1000e_setup_link(struct e1000_hw *hw)
730 struct e1000_mac_info *mac = &hw->mac;
737 if (e1000_check_reset_block(hw))
744 if (hw->fc.requested_mode == e1000_fc_default) {
745 ret_val = e1000_set_default_fc_generic(hw);
754 hw->fc.current_mode = hw->fc.requested_mode;
757 hw->fc.current_mode);
760 ret_val = mac->ops.setup_physical_interface(hw);
775 ew32(FCTTV, hw->fc.pause_time);
777 return e1000e_set_fc_watermarks(hw);
782 * @hw: pointer to the HW structure
787 static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw)
789 struct e1000_mac_info *mac = &hw->mac;
809 switch (hw->fc.current_mode) {
853 * @hw: pointer to the HW structure
858 static s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
860 struct e1000_mac_info *mac = &hw->mac;
886 ret_val = mac->ops.check_for_link(hw);
902 * @hw: pointer to the HW structure
907 s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw)
917 e1000e_config_collision_dist(hw);
919 ret_val = e1000_commit_fc_settings_generic(hw);
941 if (hw->phy.media_type == e1000_media_type_internal_serdes ||
943 ret_val = e1000_poll_fiber_serdes_link_generic(hw);
953 * @hw: pointer to the HW structure
959 void e1000e_config_collision_dist(struct e1000_hw *hw)
974 * @hw: pointer to the HW structure
980 s32 e1000e_set_fc_watermarks(struct e1000_hw *hw)
991 if (hw->fc.current_mode & e1000_fc_tx_pause) {
997 fcrtl = hw->fc.low_water;
999 fcrth = hw->fc.high_water;
1009 * @hw: pointer to the HW structure
1017 s32 e1000e_force_mac_fc(struct e1000_hw *hw)
1030 * according to the "hw->fc.current_mode" parameter.
1041 e_dbg("hw->fc.current_mode = %u\n", hw->fc.current_mode);
1043 switch (hw->fc.current_mode) {
1070 * @hw: pointer to the HW structure
1078 s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
1080 struct e1000_mac_info *mac = &hw->mac;
1091 if (hw->phy.media_type == e1000_media_type_fiber ||
1092 hw->phy.media_type == e1000_media_type_internal_serdes)
1093 ret_val = e1000e_force_mac_fc(hw);
1095 if (hw->phy.media_type == e1000_media_type_copper)
1096 ret_val = e1000e_force_mac_fc(hw);
1110 if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) {
1116 ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg);
1119 ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg);
1136 ret_val = e1e_rphy(hw, PHY_AUTONEG_ADV, &mii_nway_adv_reg);
1139 ret_val = e1e_rphy(hw, PHY_LP_ABILITY, &mii_nway_lp_ability_reg);
1186 if (hw->fc.requested_mode == e1000_fc_full) {
1187 hw->fc.current_mode = e1000_fc_full;
1190 hw->fc.current_mode = e1000_fc_rx_pause;
1207 hw->fc.current_mode = e1000_fc_tx_pause;
1222 hw->fc.current_mode = e1000_fc_rx_pause;
1229 hw->fc.current_mode = e1000_fc_none;
1238 ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
1245 hw->fc.current_mode = e1000_fc_none;
1251 ret_val = e1000e_force_mac_fc(hw);
1263 * @hw: pointer to the HW structure
1270 s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex)
1296 * @hw: pointer to the HW structure
1303 s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex)
1313 * @hw: pointer to the HW structure
1317 s32 e1000e_get_hw_semaphore(struct e1000_hw *hw)
1320 s32 timeout = hw->nvm.word_size + 1;
1352 e1000e_put_hw_semaphore(hw);
1362 * @hw: pointer to the HW structure
1366 void e1000e_put_hw_semaphore(struct e1000_hw *hw)
1377 * @hw: pointer to the HW structure
1381 s32 e1000e_get_auto_rd_done(struct e1000_hw *hw)
1402 * @hw: pointer to the HW structure
1408 s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data)
1412 ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
1426 * @hw: pointer to the HW structure
1429 s32 e1000e_id_led_init(struct e1000_hw *hw)
1431 struct e1000_mac_info *mac = &hw->mac;
1439 ret_val = hw->nvm.ops.valid_led_default(hw, &data);
1490 * @hw: pointer to the HW structure
1495 s32 e1000e_setup_led_generic(struct e1000_hw *hw)
1499 if (hw->mac.ops.setup_led != e1000e_setup_led_generic) {
1503 if (hw->phy.media_type == e1000_media_type_fiber) {
1505 hw->mac.ledctl_default = ledctl;
1513 } else if (hw->phy.media_type == e1000_media_type_copper) {
1514 ew32(LEDCTL, hw->mac.ledctl_mode1);
1522 * @hw: pointer to the HW structure
1527 s32 e1000e_cleanup_led_generic(struct e1000_hw *hw)
1529 ew32(LEDCTL, hw->mac.ledctl_default);
1535 * @hw: pointer to the HW structure
1539 s32 e1000e_blink_led(struct e1000_hw *hw)
1544 if (hw->phy.media_type == e1000_media_type_fiber) {
1553 ledctl_blink = hw->mac.ledctl_mode2;
1555 if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
1568 * @hw: pointer to the HW structure
1572 s32 e1000e_led_on_generic(struct e1000_hw *hw)
1576 switch (hw->phy.media_type) {
1584 ew32(LEDCTL, hw->mac.ledctl_mode2);
1595 * @hw: pointer to the HW structure
1599 s32 e1000e_led_off_generic(struct e1000_hw *hw)
1603 switch (hw->phy.media_type) {
1611 ew32(LEDCTL, hw->mac.ledctl_mode1);
1622 * @hw: pointer to the HW structure
1627 void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop)
1641 * @hw: pointer to the HW structure
1650 s32 e1000e_disable_pcie_master(struct e1000_hw *hw)
1677 * @hw: pointer to the HW structure
1681 void e1000e_reset_adaptive(struct e1000_hw *hw)
1683 struct e1000_mac_info *mac = &hw->mac;
1704 * @hw: pointer to the HW structure
1709 void e1000e_update_adaptive(struct e1000_hw *hw)
1711 struct e1000_mac_info *mac = &hw->mac;
1744 * @hw: pointer to the HW structure
1749 static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
1754 udelay(hw->nvm.delay_usec);
1759 * @hw: pointer to the HW structure
1764 static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
1769 udelay(hw->nvm.delay_usec);
1774 * @hw: pointer to the HW structure
1782 static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
1784 struct e1000_nvm_info *nvm = &hw->nvm;
1803 e1000_raise_eec_clk(hw, &eecd);
1804 e1000_lower_eec_clk(hw, &eecd);
1815 * @hw: pointer to the HW structure
1824 static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
1837 e1000_raise_eec_clk(hw, &eecd);
1845 e1000_lower_eec_clk(hw, &eecd);
1853 * @hw: pointer to the HW structure
1859 s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
1881 * @hw: pointer to the HW structure
1887 s32 e1000e_acquire_nvm(struct e1000_hw *hw)
1915 * @hw: pointer to the HW structure
1919 static void e1000_standby_nvm(struct e1000_hw *hw)
1921 struct e1000_nvm_info *nvm = &hw->nvm;
1939 * @hw: pointer to the HW structure
1943 static void e1000_stop_nvm(struct e1000_hw *hw)
1948 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
1951 e1000_lower_eec_clk(hw, &eecd);
1957 * @hw: pointer to the HW structure
1961 void e1000e_release_nvm(struct e1000_hw *hw)
1965 e1000_stop_nvm(hw);
1974 * @hw: pointer to the HW structure
1978 static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
1980 struct e1000_nvm_info *nvm = &hw->nvm;
1999 e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
2000 hw->nvm.opcode_bits);
2001 spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
2006 e1000_standby_nvm(hw);
2021 * @hw: pointer to the HW structure
2028 s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
2030 struct e1000_nvm_info *nvm = &hw->nvm;
2049 ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
2061 * @hw: pointer to the HW structure
2071 s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
2073 struct e1000_nvm_info *nvm = &hw->nvm;
2087 ret_val = nvm->ops.acquire(hw);
2096 ret_val = e1000_ready_nvm_eeprom(hw);
2098 nvm->ops.release(hw);
2102 e1000_standby_nvm(hw);
2105 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
2108 e1000_standby_nvm(hw);
2118 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
2119 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
2126 e1000_shift_out_eec_bits(hw, word_out, 16);
2130 e1000_standby_nvm(hw);
2137 nvm->ops.release(hw);
2143 * @hw: pointer to the HW structure
2149 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
2159 hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
2162 hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
2165 hw->mac.addr[i] = hw->mac.perm_addr[i];
2172 * @hw: pointer to the HW structure
2177 s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw)
2184 ret_val = e1000_read_nvm(hw, i, 1, &nvm_data);
2202 * @hw: pointer to the HW structure
2208 s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw)
2215 ret_val = e1000_read_nvm(hw, i, 1, &nvm_data);
2223 ret_val = e1000_write_nvm(hw, NVM_CHECKSUM_REG, 1, &checksum);
2232 * @hw: pointer to the HW structure
2237 void e1000e_reload_nvm(struct e1000_hw *hw)
2272 * @hw: pointer to the HW structure
2280 static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)
2285 if (!(hw->mac.arc_subsystem_valid)) {
2314 * @hw: pointer to the HW structure
2319 bool e1000e_check_mng_mode_generic(struct e1000_hw *hw)
2329 * @hw: pointer to the HW structure
2334 bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
2336 struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
2337 u32 *buffer = (u32 *)&hw->mng_cookie;
2342 hw->mac.tx_pkt_filtering = true;
2345 if (!e1000e_check_mng_mode(hw)) {
2346 hw->mac.tx_pkt_filtering = false;
2354 ret_val = e1000_mng_enable_host_if(hw);
2356 hw->mac.tx_pkt_filtering = false;
2364 *(buffer + i) = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF, offset + i);
2375 hw->mac.tx_pkt_filtering = true;
2381 hw->mac.tx_pkt_filtering = false;
2386 return hw->mac.tx_pkt_filtering;
2391 * @hw: pointer to the HW structure
2396 static s32 e1000_mng_write_cmd_header(struct e1000_hw *hw,
2408 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, i,
2418 * @hw: pointer to the HW structure
2428 static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer,
2446 data = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF, offset);
2451 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset, data);
2472 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data);
2483 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data);
2491 * @hw: pointer to the HW structure
2497 s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length)
2510 ret_val = e1000_mng_enable_host_if(hw);
2515 ret_val = e1000_mng_host_if_write(hw, buffer, length,
2521 ret_val = e1000_mng_write_cmd_header(hw, &hdr);
2534 * @hw: pointer to the HW structure
2539 bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw)
2550 if (hw->mac.has_fwsm) {
2560 } else if ((hw->mac.type == e1000_82574) ||
2561 (hw->mac.type == e1000_82583)) {
2565 e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
2583 s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num)
2588 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
2595 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);