Lines Matching refs:hw
108 static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw);
109 static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
110 static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
111 static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
112 static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
113 static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
114 static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
115 static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw);
116 static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
118 static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
120 static void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);
124 * @hw: pointer to the HW structure
126 static s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw)
128 struct e1000_phy_info *phy = &hw->phy;
131 if (hw->phy.media_type != e1000_media_type_copper) {
145 ret_val = e1000e_get_phy_id(hw);
156 * @hw: pointer to the HW structure
158 static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
160 struct e1000_nvm_info *nvm = &hw->nvm;
202 * @hw: pointer to the HW structure
206 struct e1000_hw *hw = &adapter->hw;
207 struct e1000_mac_info *mac = &hw->mac;
213 hw->phy.media_type = e1000_media_type_internal_serdes;
216 hw->phy.media_type = e1000_media_type_copper;
234 switch (hw->phy.media_type) {
253 hw->mac.ops.set_lan_id(hw);
260 struct e1000_hw *hw = &adapter->hw;
267 rc = e1000_init_nvm_params_80003es2lan(hw);
271 rc = e1000_init_phy_params_80003es2lan(hw);
280 * @hw: pointer to the HW structure
284 static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw)
288 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
289 return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
294 * @hw: pointer to the HW structure
298 static void e1000_release_phy_80003es2lan(struct e1000_hw *hw)
302 mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
303 e1000_release_swfw_sync_80003es2lan(hw, mask);
308 * @hw: pointer to the HW structure
313 static s32 e1000_acquire_mac_csr_80003es2lan(struct e1000_hw *hw)
319 return e1000_acquire_swfw_sync_80003es2lan(hw, mask);
324 * @hw: pointer to the HW structure
328 static void e1000_release_mac_csr_80003es2lan(struct e1000_hw *hw)
334 e1000_release_swfw_sync_80003es2lan(hw, mask);
339 * @hw: pointer to the HW structure
343 static s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw)
347 ret_val = e1000_acquire_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
351 ret_val = e1000e_acquire_nvm(hw);
354 e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
361 * @hw: pointer to the HW structure
365 static void e1000_release_nvm_80003es2lan(struct e1000_hw *hw)
367 e1000e_release_nvm(hw);
368 e1000_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
373 * @hw: pointer to the HW structure
379 static s32 e1000_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
388 if (e1000e_get_hw_semaphore(hw))
399 e1000e_put_hw_semaphore(hw);
412 e1000e_put_hw_semaphore(hw);
419 * @hw: pointer to the HW structure
425 static void e1000_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
429 while (e1000e_get_hw_semaphore(hw) != 0);
436 e1000e_put_hw_semaphore(hw);
441 * @hw: pointer to the HW structure
447 static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
454 ret_val = e1000_acquire_phy_80003es2lan(hw);
470 ret_val = e1000e_write_phy_reg_mdic(hw, page_select, temp);
472 e1000_release_phy_80003es2lan(hw);
476 if (hw->dev_spec.e80003es2lan.mdic_wa_enable == true) {
485 ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp);
489 e1000_release_phy_80003es2lan(hw);
495 ret_val = e1000e_read_phy_reg_mdic(hw,
501 ret_val = e1000e_read_phy_reg_mdic(hw,
506 e1000_release_phy_80003es2lan(hw);
513 * @hw: pointer to the HW structure
519 static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
526 ret_val = e1000_acquire_phy_80003es2lan(hw);
542 ret_val = e1000e_write_phy_reg_mdic(hw, page_select, temp);
544 e1000_release_phy_80003es2lan(hw);
548 if (hw->dev_spec.e80003es2lan.mdic_wa_enable == true) {
557 ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp);
560 e1000_release_phy_80003es2lan(hw);
566 ret_val = e1000e_write_phy_reg_mdic(hw,
572 ret_val = e1000e_write_phy_reg_mdic(hw,
577 e1000_release_phy_80003es2lan(hw);
584 * @hw: pointer to the HW structure
591 static s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
594 return e1000e_write_nvm_spi(hw, offset, words, data);
599 * @hw: pointer to the HW structure
604 static s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw)
609 if (hw->bus.func == 1)
628 * @hw: pointer to the HW structure
633 static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
643 ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
648 ret_val = e1e_wphy(hw, GG82563_PHY_SPEC_CTRL, phy_data);
654 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data);
658 e1000e_phy_force_speed_duplex_setup(hw, &phy_data);
663 ret_val = e1e_wphy(hw, PHY_CONTROL, phy_data);
669 if (hw->phy.autoneg_wait_to_complete) {
673 ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
683 ret_val = e1000e_phy_reset_dsp(hw);
689 ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
695 ret_val = e1e_rphy(hw, GG82563_PHY_MAC_SPEC_CTRL, &phy_data);
704 if (hw->mac.forced_speed_duplex & E1000_ALL_10_SPEED)
714 ret_val = e1e_wphy(hw, GG82563_PHY_MAC_SPEC_CTRL, phy_data);
721 * @hw: pointer to the HW structure
726 static s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw)
728 struct e1000_phy_info *phy = &hw->phy;
732 ret_val = e1e_rphy(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
754 * @hw: pointer to the HW structure
760 static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
765 if (hw->phy.media_type == e1000_media_type_copper) {
766 ret_val = e1000e_get_speed_and_duplex_copper(hw,
769 hw->phy.ops.cfg_on_link_up(hw);
771 ret_val = e1000e_get_speed_and_duplex_fiber_serdes(hw,
781 * @hw: pointer to the HW structure
785 static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
794 ret_val = e1000e_disable_pcie_master(hw);
809 ret_val = e1000_acquire_phy_80003es2lan(hw);
812 e1000_release_phy_80003es2lan(hw);
814 ret_val = e1000e_get_auto_rd_done(hw);
823 ret_val = e1000_check_alt_mac_addr_generic(hw);
830 * @hw: pointer to the HW structure
832 * Initialize the hw bits, LED, VFTA, MTA, link and hw counters.
834 static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
836 struct e1000_mac_info *mac = &hw->mac;
841 e1000_initialize_hw_bits_80003es2lan(hw);
844 ret_val = e1000e_id_led_init(hw);
851 mac->ops.clear_vfta(hw);
854 e1000e_init_rx_addrs(hw, mac->rar_entry_count);
859 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
862 ret_val = e1000e_setup_link(hw);
893 reg_data = E1000_READ_REG_ARRAY(hw, E1000_FFLT, 0x0001);
895 E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data);
898 hw->dev_spec.e80003es2lan.mdic_wa_enable = true;
900 ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
907 hw->dev_spec.e80003es2lan.mdic_wa_enable = false;
916 e1000_clear_hw_cntrs_80003es2lan(hw);
922 * e1000_initialize_hw_bits_80003es2lan - Init hw bits of ESB2
923 * @hw: pointer to the HW structure
927 static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw)
944 if (hw->phy.media_type != e1000_media_type_copper)
959 * @hw: pointer to the HW structure
963 static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
965 struct e1000_phy_info *phy = &hw->phy;
970 ret_val = e1e_rphy(hw, GG82563_PHY_MAC_SPEC_CTRL, &data);
978 ret_val = e1e_wphy(hw, GG82563_PHY_MAC_SPEC_CTRL, data);
990 ret_val = e1e_rphy(hw, GG82563_PHY_SPEC_CTRL, &data);
1020 ret_val = e1e_wphy(hw, GG82563_PHY_SPEC_CTRL, data);
1025 ret_val = e1000e_commit_phy(hw);
1032 ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
1039 ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
1045 ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
1051 ret_val = e1e_rphy(hw, GG82563_PHY_SPEC_CTRL_2, &data);
1056 ret_val = e1e_wphy(hw, GG82563_PHY_SPEC_CTRL_2, data);
1064 ret_val = e1e_rphy(hw, GG82563_PHY_PWR_MGMT_CTRL, &data);
1073 if (!e1000e_check_mng_mode(hw)) {
1076 ret_val = e1e_wphy(hw, GG82563_PHY_PWR_MGMT_CTRL, data);
1080 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, &data);
1085 ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, data);
1090 ret_val = e1e_rphy(hw, GG82563_PHY_INBAND_CTRL, &data);
1095 ret_val = e1e_wphy(hw, GG82563_PHY_INBAND_CTRL, data);
1104 * @hw: pointer to the HW structure
1109 static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
1125 ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 4),
1129 ret_val = e1000_read_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
1134 ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
1138 ret_val = e1000_read_kmrn_reg_80003es2lan(hw,
1144 ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
1150 ret_val = e1000_copper_link_setup_gg82563_80003es2lan(hw);
1154 ret_val = e1000e_setup_copper_link(hw);
1161 * @hw: pointer to the HW structure
1167 static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw)
1173 if (hw->phy.media_type == e1000_media_type_copper) {
1174 ret_val = e1000e_get_speed_and_duplex_copper(hw, &speed,
1180 ret_val = e1000_cfg_kmrn_1000_80003es2lan(hw);
1182 ret_val = e1000_cfg_kmrn_10_100_80003es2lan(hw, duplex);
1190 * @hw: pointer to the HW structure
1196 static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)
1204 ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
1217 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, ®_data);
1221 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, ®_data2);
1232 ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
1239 * @hw: pointer to the HW structure
1244 static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)
1252 ret_val = e1000_write_kmrn_reg_80003es2lan(hw,
1265 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, ®_data);
1269 ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL, ®_data2);
1276 ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
1283 * @hw: pointer to the HW structure
1291 static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
1297 ret_val = e1000_acquire_mac_csr_80003es2lan(hw);
1310 e1000_release_mac_csr_80003es2lan(hw);
1317 * @hw: pointer to the HW structure
1325 static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
1331 ret_val = e1000_acquire_mac_csr_80003es2lan(hw);
1341 e1000_release_mac_csr_80003es2lan(hw);
1348 * @hw: pointer to the HW structure
1350 static s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw)
1359 ret_val = e1000_check_alt_mac_addr_generic(hw);
1363 ret_val = e1000_read_mac_addr_generic(hw);
1371 * @hw: pointer to the HW structure
1376 static void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw)
1379 if (!(hw->mac.ops.check_mng_mode(hw) ||
1380 hw->phy.ops.check_reset_block(hw)))
1381 e1000_power_down_phy_copper(hw);
1386 * @hw: pointer to the HW structure
1390 static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)
1392 e1000e_clear_hw_cntrs_base(hw);