Lines Matching refs:hw
35 static s32 e1000_check_downshift(struct e1000_hw *hw);
36 static s32 e1000_check_polarity(struct e1000_hw *hw,
38 static void e1000_clear_hw_cntrs(struct e1000_hw *hw);
39 static void e1000_clear_vfta(struct e1000_hw *hw);
40 static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw,
42 static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw);
43 static s32 e1000_detect_gig_phy(struct e1000_hw *hw);
44 static s32 e1000_get_auto_rd_done(struct e1000_hw *hw);
45 static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
47 static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw);
48 static s32 e1000_id_led_init(struct e1000_hw *hw);
49 static void e1000_init_rx_addrs(struct e1000_hw *hw);
50 static s32 e1000_phy_igp_get_info(struct e1000_hw *hw,
52 static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
54 static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
55 static s32 e1000_wait_autoneg(struct e1000_hw *hw);
56 static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value);
57 static s32 e1000_set_phy_type(struct e1000_hw *hw);
58 static void e1000_phy_init_script(struct e1000_hw *hw);
59 static s32 e1000_setup_copper_link(struct e1000_hw *hw);
60 static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw);
61 static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw);
62 static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw);
63 static s32 e1000_config_mac_to_phy(struct e1000_hw *hw);
64 static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
65 static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl);
66 static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data, u16 count);
67 static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw);
68 static s32 e1000_phy_reset_dsp(struct e1000_hw *hw);
69 static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset,
71 static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset,
73 static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw);
74 static void e1000_raise_ee_clk(struct e1000_hw *hw, u32 *eecd);
75 static void e1000_lower_ee_clk(struct e1000_hw *hw, u32 *eecd);
76 static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data, u16 count);
77 static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
79 static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
81 static u16 e1000_shift_in_ee_bits(struct e1000_hw *hw, u16 count);
82 static s32 e1000_acquire_eeprom(struct e1000_hw *hw);
83 static void e1000_release_eeprom(struct e1000_hw *hw);
84 static void e1000_standby_eeprom(struct e1000_hw *hw);
85 static s32 e1000_set_vco_speed(struct e1000_hw *hw);
86 static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw);
87 static s32 e1000_set_phy_mode(struct e1000_hw *hw);
88 static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
90 static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
112 * e1000_set_phy_type - Set the phy type member in the hw struct.
113 * @hw: Struct containing variables accessed by shared code
115 static s32 e1000_set_phy_type(struct e1000_hw *hw)
119 if (hw->mac_type == e1000_undefined)
122 switch (hw->phy_id) {
127 hw->phy_type = e1000_phy_m88;
130 if (hw->mac_type == e1000_82541 ||
131 hw->mac_type == e1000_82541_rev_2 ||
132 hw->mac_type == e1000_82547 ||
133 hw->mac_type == e1000_82547_rev_2) {
134 hw->phy_type = e1000_phy_igp;
139 hw->phy_type = e1000_phy_undefined;
148 * @hw: Struct containing variables accessed by shared code
150 static void e1000_phy_init_script(struct e1000_hw *hw)
157 if (hw->phy_init_script) {
162 ret_val = e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);
165 e1000_write_phy_reg(hw, 0x2F5B, 0x0003);
168 e1000_write_phy_reg(hw, 0x0000, 0x0140);
171 switch (hw->mac_type) {
174 e1000_write_phy_reg(hw, 0x1F95, 0x0001);
175 e1000_write_phy_reg(hw, 0x1F71, 0xBD21);
176 e1000_write_phy_reg(hw, 0x1F79, 0x0018);
177 e1000_write_phy_reg(hw, 0x1F30, 0x1600);
178 e1000_write_phy_reg(hw, 0x1F31, 0x0014);
179 e1000_write_phy_reg(hw, 0x1F32, 0x161C);
180 e1000_write_phy_reg(hw, 0x1F94, 0x0003);
181 e1000_write_phy_reg(hw, 0x1F96, 0x003F);
182 e1000_write_phy_reg(hw, 0x2010, 0x0008);
187 e1000_write_phy_reg(hw, 0x1F73, 0x0099);
193 e1000_write_phy_reg(hw, 0x0000, 0x3300);
197 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);
199 if (hw->mac_type == e1000_82547) {
203 e1000_read_phy_reg(hw,
208 e1000_read_phy_reg(hw,
231 e1000_write_phy_reg(hw,
234 e1000_write_phy_reg(hw,
243 * e1000_set_mac_type - Set the mac type member in the hw struct.
244 * @hw: Struct containing variables accessed by shared code
246 s32 e1000_set_mac_type(struct e1000_hw *hw)
250 switch (hw->device_id) {
252 switch (hw->revision_id) {
254 hw->mac_type = e1000_82542_rev2_0;
257 hw->mac_type = e1000_82542_rev2_1;
266 hw->mac_type = e1000_82543;
272 hw->mac_type = e1000_82544;
279 hw->mac_type = e1000_82540;
283 hw->mac_type = e1000_82545;
288 hw->mac_type = e1000_82545_rev_3;
293 hw->mac_type = e1000_82546;
301 hw->mac_type = e1000_82546_rev_3;
306 hw->mac_type = e1000_82541;
312 hw->mac_type = e1000_82541_rev_2;
316 hw->mac_type = e1000_82547;
319 hw->mac_type = e1000_82547_rev_2;
326 switch (hw->mac_type) {
331 hw->asf_firmware_present = true;
340 if (hw->mac_type == e1000_82543)
341 hw->bad_tx_carr_stats_fd = true;
343 if (hw->mac_type > e1000_82544)
344 hw->has_smbus = true;
351 * @hw: Struct containing variables accessed by shared code
353 void e1000_set_media_type(struct e1000_hw *hw)
359 if (hw->mac_type != e1000_82543) {
361 hw->tbi_compatibility_en = false;
364 switch (hw->device_id) {
367 hw->media_type = e1000_media_type_internal_serdes;
370 switch (hw->mac_type) {
373 hw->media_type = e1000_media_type_fiber;
378 hw->media_type = e1000_media_type_fiber;
380 hw->tbi_compatibility_en = false;
382 hw->media_type = e1000_media_type_copper;
391 * @hw: Struct containing variables accessed by shared code
395 s32 e1000_reset_hw(struct e1000_hw *hw)
407 if (hw->mac_type == e1000_82542_rev2_0) {
409 e1000_pci_clear_mwi(hw);
425 hw->tbi_compatibility_on = false;
435 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) {
447 switch (hw->mac_type) {
454 E1000_WRITE_REG_IO(hw, CTRL, (ctrl | E1000_CTRL_RST));
470 switch (hw->mac_type) {
493 ret_val = e1000_get_auto_rd_done(hw);
500 if (hw->mac_type >= e1000_82540) {
506 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) {
507 e1000_phy_init_script(hw);
524 if (hw->mac_type == e1000_82542_rev2_0) {
525 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
526 e1000_pci_set_mwi(hw);
534 * @hw: Struct containing variables accessed by shared code
542 s32 e1000_init_hw(struct e1000_hw *hw)
553 ret_val = e1000_id_led_init(hw);
560 e1000_set_media_type(hw);
564 if (hw->mac_type < e1000_82545_rev_3)
566 e1000_clear_vfta(hw);
569 if (hw->mac_type == e1000_82542_rev2_0) {
571 e1000_pci_clear_mwi(hw);
580 e1000_init_rx_addrs(hw);
583 if (hw->mac_type == e1000_82542_rev2_0) {
587 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
588 e1000_pci_set_mwi(hw);
595 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
606 if (hw->dma_fairness && hw->mac_type <= e1000_82543) {
611 switch (hw->mac_type) {
616 if (hw->bus_type == e1000_bus_type_pcix
617 && e1000_pcix_get_mmrbc(hw) > 2048)
618 e1000_pcix_set_mmrbc(hw, 2048);
623 ret_val = e1000_setup_link(hw);
626 if (hw->mac_type > e1000_82544) {
639 e1000_clear_hw_cntrs(hw);
641 if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER ||
642 hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) {
655 * @hw: Struct containing variables accessed by shared code.
657 static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw)
664 if (hw->media_type != e1000_media_type_internal_serdes)
667 switch (hw->mac_type) {
675 ret_val = e1000_read_eeprom(hw, EEPROM_SERDES_AMPLITUDE, 1,
685 e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data);
695 * @hw: Struct containing variables accessed by shared code
703 s32 e1000_setup_link(struct e1000_hw *hw)
716 * control setting, then the variable hw->fc will
719 if (hw->fc == E1000_FC_DEFAULT) {
720 ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG,
727 hw->fc = E1000_FC_NONE;
730 hw->fc = E1000_FC_TX_PAUSE;
732 hw->fc = E1000_FC_FULL;
739 if (hw->mac_type == e1000_82542_rev2_0)
740 hw->fc &= (~E1000_FC_TX_PAUSE);
742 if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1))
743 hw->fc &= (~E1000_FC_RX_PAUSE);
745 hw->original_fc = hw->fc;
747 e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc);
756 if (hw->mac_type == e1000_82543) {
757 ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG,
769 ret_val = (hw->media_type == e1000_media_type_copper) ?
770 e1000_setup_copper_link(hw) : e1000_setup_fiber_serdes_link(hw);
783 ew32(FCTTV, hw->fc_pause_time);
791 if (!(hw->fc & E1000_FC_TX_PAUSE)) {
798 if (hw->fc_send_xon) {
799 ew32(FCRTL, (hw->fc_low_water | E1000_FCRTL_XONE));
800 ew32(FCRTH, hw->fc_high_water);
802 ew32(FCRTL, hw->fc_low_water);
803 ew32(FCRTH, hw->fc_high_water);
811 * @hw: Struct containing variables accessed by shared code
817 static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw)
835 if (hw->media_type == e1000_media_type_fiber)
836 signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0;
838 ret_val = e1000_adjust_serdes_amplitude(hw);
846 ret_val = e1000_set_vco_speed(hw);
850 e1000_config_collision_dist(hw);
867 switch (hw->fc) {
909 hw->txcw = txcw;
918 if (hw->media_type == e1000_media_type_internal_serdes ||
929 hw->autoneg_failed = 1;
935 ret_val = e1000_check_for_link(hw);
940 hw->autoneg_failed = 0;
942 hw->autoneg_failed = 0;
953 * @hw: Struct containing variables accessed by shared code
957 static s32 e1000_copper_link_preconfig(struct e1000_hw *hw)
970 if (hw->mac_type > e1000_82543) {
978 ret_val = e1000_phy_hw_reset(hw);
984 ret_val = e1000_detect_gig_phy(hw);
989 e_dbg("Phy ID = %x\n", hw->phy_id);
992 ret_val = e1000_set_phy_mode(hw);
996 if ((hw->mac_type == e1000_82545_rev_3) ||
997 (hw->mac_type == e1000_82546_rev_3)) {
999 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1002 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1005 if (hw->mac_type <= e1000_82543 ||
1006 hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 ||
1007 hw->mac_type == e1000_82541_rev_2
1008 || hw->mac_type == e1000_82547_rev_2)
1009 hw->phy_reset_disable = false;
1016 * @hw: Struct containing variables accessed by shared code
1018 static s32 e1000_copper_link_igp_setup(struct e1000_hw *hw)
1026 if (hw->phy_reset_disable)
1029 ret_val = e1000_phy_reset(hw);
1044 if (hw->phy_type == e1000_phy_igp) {
1046 ret_val = e1000_set_d3_lplu_state(hw, false);
1054 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
1058 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) {
1059 hw->dsp_config_state = e1000_dsp_config_disabled;
1064 hw->mdix = 1;
1067 hw->dsp_config_state = e1000_dsp_config_enabled;
1070 switch (hw->mdix) {
1083 ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
1088 if (hw->autoneg) {
1089 e1000_ms_type phy_ms_setting = hw->master_slave;
1091 if (hw->ffe_config_state == e1000_ffe_config_active)
1092 hw->ffe_config_state = e1000_ffe_config_enabled;
1094 if (hw->dsp_config_state == e1000_dsp_config_activated)
1095 hw->dsp_config_state = e1000_dsp_config_enabled;
1100 if (hw->autoneg_advertised == ADVERTISE_1000_FULL) {
1103 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1109 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1115 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_data);
1120 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_data);
1125 ret_val = e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_data);
1130 hw->original_master_slave = (phy_data & CR_1000T_MS_ENABLE) ?
1148 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_data);
1158 * @hw: Struct containing variables accessed by shared code
1160 static s32 e1000_copper_link_mgp_setup(struct e1000_hw *hw)
1167 if (hw->phy_reset_disable)
1171 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1186 switch (hw->mdix) {
1209 if (hw->disable_polarity_correction == 1)
1211 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1215 if (hw->phy_revision < M88E1011_I_REV_4) {
1220 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1227 if ((hw->phy_revision == E1000_REVISION_2) &&
1228 (hw->phy_id == M88E1111_I_PHY_ID)) {
1232 ret_val = e1000_write_phy_reg(hw,
1243 ret_val = e1000_write_phy_reg(hw,
1252 ret_val = e1000_phy_reset(hw);
1263 * @hw: Struct containing variables accessed by shared code
1268 static s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
1275 /* Perform some bounds checking on the hw->autoneg_advertised
1278 hw->autoneg_advertised &= AUTONEG_ADVERTISE_SPEED_DEFAULT;
1283 if (hw->autoneg_advertised == 0)
1284 hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT;
1287 ret_val = e1000_phy_setup_autoneg(hw);
1297 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
1302 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
1309 if (hw->wait_autoneg_complete) {
1310 ret_val = e1000_wait_autoneg(hw);
1318 hw->get_link_status = true;
1325 * @hw: Struct containing variables accessed by shared code
1336 static s32 e1000_copper_link_postconfig(struct e1000_hw *hw)
1341 if (hw->mac_type >= e1000_82544) {
1342 e1000_config_collision_dist(hw);
1344 ret_val = e1000_config_mac_to_phy(hw);
1350 ret_val = e1000_config_fc_after_link_up(hw);
1357 if (hw->phy_type == e1000_phy_igp) {
1358 ret_val = e1000_config_dsp_after_link_change(hw, true);
1370 * @hw: Struct containing variables accessed by shared code
1374 static s32 e1000_setup_copper_link(struct e1000_hw *hw)
1383 ret_val = e1000_copper_link_preconfig(hw);
1387 if (hw->phy_type == e1000_phy_igp) {
1388 ret_val = e1000_copper_link_igp_setup(hw);
1391 } else if (hw->phy_type == e1000_phy_m88) {
1392 ret_val = e1000_copper_link_mgp_setup(hw);
1397 if (hw->autoneg) {
1400 ret_val = e1000_copper_link_autoneg(hw);
1407 ret_val = e1000_phy_force_speed_duplex(hw);
1418 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
1421 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
1427 ret_val = e1000_copper_link_postconfig(hw);
1443 * @hw: Struct containing variables accessed by shared code
1447 s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
1456 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
1462 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);
1480 e_dbg("autoneg_advertised %x\n", hw->autoneg_advertised);
1483 if (hw->autoneg_advertised & ADVERTISE_10_HALF) {
1489 if (hw->autoneg_advertised & ADVERTISE_10_FULL) {
1495 if (hw->autoneg_advertised & ADVERTISE_100_HALF) {
1501 if (hw->autoneg_advertised & ADVERTISE_100_FULL) {
1507 if (hw->autoneg_advertised & ADVERTISE_1000_HALF) {
1513 if (hw->autoneg_advertised & ADVERTISE_1000_FULL) {
1534 switch (hw->fc) {
1549 *hw's ability to send PAUSE frames.
1571 ret_val = e1000_write_phy_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
1577 ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);
1586 * @hw: Struct containing variables accessed by shared code
1588 * Force PHY speed and duplex settings to hw->forced_speed_duplex
1590 static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw)
1602 hw->fc = E1000_FC_NONE;
1604 e_dbg("hw->fc = %d\n", hw->fc);
1617 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &mii_ctrl_reg);
1626 if (hw->forced_speed_duplex == e1000_100_full ||
1627 hw->forced_speed_duplex == e1000_10_full) {
1644 if (hw->forced_speed_duplex == e1000_100_full ||
1645 hw->forced_speed_duplex == e1000_100_half) {
1659 e1000_config_collision_dist(hw);
1664 if (hw->phy_type == e1000_phy_m88) {
1666 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1675 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1690 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
1698 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
1704 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, mii_ctrl_reg);
1717 if (hw->wait_autoneg_complete) {
1728 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
1733 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
1741 if ((i == 0) && (hw->phy_type == e1000_phy_m88)) {
1743 ret_val = e1000_phy_reset_dsp(hw);
1758 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
1763 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
1769 if (hw->phy_type == e1000_phy_m88) {
1775 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1782 e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1791 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1797 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1801 if ((hw->mac_type == e1000_82544 || hw->mac_type == e1000_82543)
1802 && (!hw->autoneg)
1803 && (hw->forced_speed_duplex == e1000_10_full
1804 || hw->forced_speed_duplex == e1000_10_half)) {
1805 ret_val = e1000_polarity_reversal_workaround(hw);
1815 * @hw: Struct containing variables accessed by shared code
1821 void e1000_config_collision_dist(struct e1000_hw *hw)
1827 if (hw->mac_type < e1000_82543)
1843 * @hw: Struct containing variables accessed by shared code
1850 static s32 e1000_config_mac_to_phy(struct e1000_hw *hw)
1860 if (hw->mac_type >= e1000_82544)
1873 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1882 e1000_config_collision_dist(hw);
1899 * @hw: Struct containing variables accessed by shared code
1908 s32 e1000_force_mac_fc(struct e1000_hw *hw)
1923 * according to the "hw->fc" parameter.
1935 switch (hw->fc) {
1956 if (hw->mac_type == e1000_82542_rev2_0)
1965 * @hw: Struct containing variables accessed by shared code
1974 static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw)
1989 if (((hw->media_type == e1000_media_type_fiber) && (hw->autoneg_failed))
1990 || ((hw->media_type == e1000_media_type_internal_serdes)
1991 && (hw->autoneg_failed))
1992 || ((hw->media_type == e1000_media_type_copper)
1993 && (!hw->autoneg))) {
1994 ret_val = e1000_force_mac_fc(hw);
2006 if ((hw->media_type == e1000_media_type_copper) && hw->autoneg) {
2011 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
2014 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
2025 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_ADV,
2029 ret_val = e1000_read_phy_reg(hw, PHY_LP_ABILITY,
2076 if (hw->original_fc == E1000_FC_FULL) {
2077 hw->fc = E1000_FC_FULL;
2080 hw->fc = E1000_FC_RX_PAUSE;
2098 hw->fc = E1000_FC_TX_PAUSE;
2115 hw->fc = E1000_FC_RX_PAUSE;
2139 else if ((hw->original_fc == E1000_FC_NONE ||
2140 hw->original_fc == E1000_FC_TX_PAUSE) ||
2141 hw->fc_strict_ieee) {
2142 hw->fc = E1000_FC_NONE;
2145 hw->fc = E1000_FC_RX_PAUSE;
2155 e1000_get_speed_and_duplex(hw, &speed, &duplex);
2163 hw->fc = E1000_FC_NONE;
2168 ret_val = e1000_force_mac_fc(hw);
2184 * @hw: pointer to the HW structure
2189 static s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
2211 if (hw->autoneg_failed == 0) {
2212 hw->autoneg_failed = 1;
2218 ew32(TXCW, (hw->txcw & ~E1000_TXCW_ANE));
2226 ret_val = e1000_config_fc_after_link_up(hw);
2239 ew32(TXCW, hw->txcw);
2242 hw->serdes_has_link = true;
2254 hw->serdes_has_link = true;
2258 hw->serdes_has_link = false;
2271 hw->serdes_has_link = true;
2275 hw->serdes_has_link = false;
2280 hw->serdes_has_link = false;
2284 hw->serdes_has_link = false;
2295 * @hw: Struct containing variables accessed by shared code
2300 s32 e1000_check_for_link(struct e1000_hw *hw)
2320 if ((hw->media_type == e1000_media_type_fiber) ||
2321 (hw->media_type == e1000_media_type_internal_serdes)) {
2324 if (hw->media_type == e1000_media_type_fiber) {
2326 (hw->mac_type >
2329 hw->get_link_status = false;
2339 if ((hw->media_type == e1000_media_type_copper) && hw->get_link_status) {
2345 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
2348 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
2353 hw->get_link_status = false;
2356 e1000_check_downshift(hw);
2359 if ((hw->mac_type == e1000_82544
2360 || hw->mac_type == e1000_82543) && (!hw->autoneg)
2361 && (hw->forced_speed_duplex == e1000_10_full
2362 || hw->forced_speed_duplex == e1000_10_half)) {
2365 e1000_polarity_reversal_workaround(hw);
2373 e1000_config_dsp_after_link_change(hw, false);
2380 if (!hw->autoneg)
2384 e1000_config_dsp_after_link_change(hw, true);
2394 if (hw->mac_type >= e1000_82544)
2395 e1000_config_collision_dist(hw);
2397 ret_val = e1000_config_mac_to_phy(hw);
2409 ret_val = e1000_config_fc_after_link_up(hw);
2422 if (hw->tbi_compatibility_en) {
2425 e1000_get_speed_and_duplex(hw, &speed, &duplex);
2435 if (hw->tbi_compatibility_on) {
2440 hw->tbi_compatibility_on = false;
2448 if (!hw->tbi_compatibility_on) {
2449 hw->tbi_compatibility_on = true;
2458 if ((hw->media_type == e1000_media_type_fiber) ||
2459 (hw->media_type == e1000_media_type_internal_serdes))
2460 e1000_check_for_serdes_link_generic(hw);
2467 * @hw: Struct containing variables accessed by shared code
2473 s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex)
2481 if (hw->mac_type >= e1000_82543) {
2511 if (hw->phy_type == e1000_phy_igp && hw->speed_downgraded) {
2512 ret_val = e1000_read_phy_reg(hw, PHY_AUTONEG_EXP, &phy_data);
2520 e1000_read_phy_reg(hw, PHY_LP_ABILITY, &phy_data);
2536 * @hw: Struct containing variables accessed by shared code
2540 static s32 e1000_wait_autoneg(struct e1000_hw *hw)
2554 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
2557 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
2570 * @hw: Struct containing variables accessed by shared code
2573 static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl)
2585 * @hw: Struct containing variables accessed by shared code
2588 static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl)
2600 * @hw: Struct containing variables accessed by shared code
2606 static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data, u16 count)
2639 e1000_raise_mdi_clk(hw, &ctrl);
2640 e1000_lower_mdi_clk(hw, &ctrl);
2648 * @hw: Struct containing variables accessed by shared code
2652 static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw)
2678 e1000_raise_mdi_clk(hw, &ctrl);
2679 e1000_lower_mdi_clk(hw, &ctrl);
2683 e1000_raise_mdi_clk(hw, &ctrl);
2688 e1000_lower_mdi_clk(hw, &ctrl);
2691 e1000_raise_mdi_clk(hw, &ctrl);
2692 e1000_lower_mdi_clk(hw, &ctrl);
2700 * @hw: Struct containing variables accessed by shared code
2706 s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data)
2712 if ((hw->phy_type == e1000_phy_igp) &&
2714 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
2720 ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2726 static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2740 if (hw->mac_type > e1000_82543) {
2772 e1000_shift_out_mdi_bits(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE);
2788 e1000_shift_out_mdi_bits(hw, mdic, 14);
2794 *phy_data = e1000_shift_in_mdi_bits(hw);
2802 * @hw: Struct containing variables accessed by shared code
2808 s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 phy_data)
2814 if ((hw->phy_type == e1000_phy_igp) &&
2816 ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
2822 ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2828 static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
2842 if (hw->mac_type > e1000_82543) {
2871 e1000_shift_out_mdi_bits(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE);
2884 e1000_shift_out_mdi_bits(hw, mdic, 32);
2892 * @hw: Struct containing variables accessed by shared code
2896 s32 e1000_phy_hw_reset(struct e1000_hw *hw)
2906 if (hw->mac_type > e1000_82543) {
2937 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) {
2946 ret_val = e1000_get_phy_cfg_done(hw);
2955 * @hw: Struct containing variables accessed by shared code
2960 s32 e1000_phy_reset(struct e1000_hw *hw)
2967 switch (hw->phy_type) {
2969 ret_val = e1000_phy_hw_reset(hw);
2974 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data);
2979 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data);
2987 if (hw->phy_type == e1000_phy_igp)
2988 e1000_phy_init_script(hw);
2995 * @hw: Struct containing variables accessed by shared code
2999 static s32 e1000_detect_gig_phy(struct e1000_hw *hw)
3007 if (hw->phy_id != 0)
3011 ret_val = e1000_read_phy_reg(hw, PHY_ID1, &phy_id_high);
3015 hw->phy_id = (u32) (phy_id_high << 16);
3017 ret_val = e1000_read_phy_reg(hw, PHY_ID2, &phy_id_low);
3021 hw->phy_id |= (u32) (phy_id_low & PHY_REVISION_MASK);
3022 hw->phy_revision = (u32) phy_id_low & ~PHY_REVISION_MASK;
3024 switch (hw->mac_type) {
3026 if (hw->phy_id == M88E1000_E_PHY_ID)
3030 if (hw->phy_id == M88E1000_I_PHY_ID)
3038 if (hw->phy_id == M88E1011_I_PHY_ID)
3045 if (hw->phy_id == IGP01E1000_I_PHY_ID)
3049 e_dbg("Invalid MAC type %d\n", hw->mac_type);
3052 phy_init_status = e1000_set_phy_type(hw);
3055 e_dbg("PHY ID 0x%X detected\n", hw->phy_id);
3058 e_dbg("Invalid PHY ID 0x%X\n", hw->phy_id);
3064 * @hw: Struct containing variables accessed by shared code
3068 static s32 e1000_phy_reset_dsp(struct e1000_hw *hw)
3074 ret_val = e1000_write_phy_reg(hw, 29, 0x001d);
3077 ret_val = e1000_write_phy_reg(hw, 30, 0x00c1);
3080 ret_val = e1000_write_phy_reg(hw, 30, 0x0000);
3091 * @hw: Struct containing variables accessed by shared code
3096 static s32 e1000_phy_igp_get_info(struct e1000_hw *hw,
3106 * and it stored in the hw->speed_downgraded parameter. */
3107 phy_info->downshift = (e1000_downshift) hw->speed_downgraded;
3116 ret_val = e1000_check_polarity(hw, &polarity);
3122 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS, &phy_data);
3133 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
3145 ret_val = e1000_get_cable_length(hw, &min_length, &max_length);
3169 * @hw: Struct containing variables accessed by shared code
3174 static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
3184 * and it stored in the hw->speed_downgraded parameter. */
3185 phy_info->downshift = (e1000_downshift) hw->speed_downgraded;
3187 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
3203 ret_val = e1000_check_polarity(hw, &polarity);
3208 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
3225 ret_val = e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
3243 * @hw: Struct containing variables accessed by shared code
3248 s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info)
3264 if (hw->media_type != e1000_media_type_copper) {
3269 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
3273 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
3282 if (hw->phy_type == e1000_phy_igp)
3283 return e1000_phy_igp_get_info(hw, phy_info);
3285 return e1000_phy_m88_get_info(hw, phy_info);
3288 s32 e1000_validate_mdi_setting(struct e1000_hw *hw)
3292 if (!hw->autoneg && (hw->mdix == 0 || hw->mdix == 3)) {
3294 hw->mdix = 1;
3302 * @hw: Struct containing variables accessed by shared code
3304 * Sets up eeprom variables in the hw struct. Must be called after mac_type
3307 s32 e1000_init_eeprom_params(struct e1000_hw *hw)
3309 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3316 switch (hw->mac_type) {
3381 ret_val = e1000_read_eeprom(hw, EEPROM_CFG, 1, &eeprom_size);
3399 * @hw: Struct containing variables accessed by shared code
3402 static void e1000_raise_ee_clk(struct e1000_hw *hw, u32 *eecd)
3410 udelay(hw->eeprom.delay_usec);
3415 * @hw: Struct containing variables accessed by shared code
3418 static void e1000_lower_ee_clk(struct e1000_hw *hw, u32 *eecd)
3426 udelay(hw->eeprom.delay_usec);
3431 * @hw: Struct containing variables accessed by shared code
3435 static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data, u16 count)
3437 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3468 e1000_raise_ee_clk(hw, &eecd);
3469 e1000_lower_ee_clk(hw, &eecd);
3482 * @hw: Struct containing variables accessed by shared code
3485 static u16 e1000_shift_in_ee_bits(struct e1000_hw *hw, u16 count)
3505 e1000_raise_ee_clk(hw, &eecd);
3513 e1000_lower_ee_clk(hw, &eecd);
3521 * @hw: Struct containing variables accessed by shared code
3526 static s32 e1000_acquire_eeprom(struct e1000_hw *hw)
3528 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3536 if (hw->mac_type > e1000_82544) {
3576 * @hw: Struct containing variables accessed by shared code
3578 static void e1000_standby_eeprom(struct e1000_hw *hw)
3580 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3623 * @hw: Struct containing variables accessed by shared code
3627 static void e1000_release_eeprom(struct e1000_hw *hw)
3635 if (hw->eeprom.type == e1000_eeprom_spi) {
3641 udelay(hw->eeprom.delay_usec);
3642 } else if (hw->eeprom.type == e1000_eeprom_microwire) {
3654 udelay(hw->eeprom.delay_usec);
3660 udelay(hw->eeprom.delay_usec);
3664 if (hw->mac_type > e1000_82544) {
3672 * @hw: Struct containing variables accessed by shared code
3674 static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw)
3688 e1000_shift_out_ee_bits(hw, EEPROM_RDSR_OPCODE_SPI,
3689 hw->eeprom.opcode_bits);
3690 spi_stat_reg = (u8) e1000_shift_in_ee_bits(hw, 8);
3697 e1000_standby_eeprom(hw);
3713 * @hw: Struct containing variables accessed by shared code
3718 s32 e1000_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
3722 ret = e1000_do_read_eeprom(hw, offset, words, data);
3727 static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
3730 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3737 e1000_init_eeprom_params(hw);
3754 if (e1000_acquire_eeprom(hw) != E1000_SUCCESS)
3763 if (e1000_spi_eeprom_ready(hw)) {
3764 e1000_release_eeprom(hw);
3768 e1000_standby_eeprom(hw);
3775 e1000_shift_out_ee_bits(hw, read_opcode, eeprom->opcode_bits);
3776 e1000_shift_out_ee_bits(hw, (u16) (offset * 2),
3785 word_in = e1000_shift_in_ee_bits(hw, 16);
3791 e1000_shift_out_ee_bits(hw,
3794 e1000_shift_out_ee_bits(hw, (u16) (offset + i),
3799 data[i] = e1000_shift_in_ee_bits(hw, 16);
3800 e1000_standby_eeprom(hw);
3805 e1000_release_eeprom(hw);
3812 * @hw: Struct containing variables accessed by shared code
3818 s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw)
3826 if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) {
3843 * @hw: Struct containing variables accessed by shared code
3848 s32 e1000_update_eeprom_checksum(struct e1000_hw *hw)
3856 if (e1000_read_eeprom(hw, i, 1, &eeprom_data) < 0) {
3863 if (e1000_write_eeprom(hw, EEPROM_CHECKSUM_REG, 1, &checksum) < 0) {
3872 * @hw: Struct containing variables accessed by shared code
3880 s32 e1000_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
3884 ret = e1000_do_write_eeprom(hw, offset, words, data);
3889 static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words,
3892 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3899 e1000_init_eeprom_params(hw);
3911 if (e1000_acquire_eeprom(hw) != E1000_SUCCESS)
3915 status = e1000_write_eeprom_microwire(hw, offset, words, data);
3917 status = e1000_write_eeprom_spi(hw, offset, words, data);
3922 e1000_release_eeprom(hw);
3929 * @hw: Struct containing variables accessed by shared code
3934 static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset, u16 words,
3937 struct e1000_eeprom_info *eeprom = &hw->eeprom;
3945 if (e1000_spi_eeprom_ready(hw))
3948 e1000_standby_eeprom(hw);
3951 e1000_shift_out_ee_bits(hw, EEPROM_WREN_OPCODE_SPI,
3954 e1000_standby_eeprom(hw);
3961 e1000_shift_out_ee_bits(hw, write_opcode, eeprom->opcode_bits);
3963 e1000_shift_out_ee_bits(hw, (u16) ((offset + widx) * 2),
3972 e1000_shift_out_ee_bits(hw, word_out, 16);
3980 e1000_standby_eeprom(hw);
3991 * @hw: Struct containing variables accessed by shared code
3996 static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset,
3999 struct e1000_eeprom_info *eeprom = &hw->eeprom;
4012 e1000_shift_out_ee_bits(hw, EEPROM_EWEN_OPCODE_MICROWIRE,
4015 e1000_shift_out_ee_bits(hw, 0, (u16) (eeprom->address_bits - 2));
4018 e1000_standby_eeprom(hw);
4022 e1000_shift_out_ee_bits(hw, EEPROM_WRITE_OPCODE_MICROWIRE,
4025 e1000_shift_out_ee_bits(hw, (u16) (offset + words_written),
4029 e1000_shift_out_ee_bits(hw, data[words_written], 16);
4034 e1000_standby_eeprom(hw);
4052 e1000_standby_eeprom(hw);
4063 e1000_shift_out_ee_bits(hw, EEPROM_EWDS_OPCODE_MICROWIRE,
4066 e1000_shift_out_ee_bits(hw, 0, (u16) (eeprom->address_bits - 2));
4073 * @hw: Struct containing variables accessed by shared code
4078 s32 e1000_read_mac_addr(struct e1000_hw *hw)
4087 if (e1000_read_eeprom(hw, offset, 1, &eeprom_data) < 0) {
4091 hw->perm_mac_addr[i] = (u8) (eeprom_data & 0x00FF);
4092 hw->perm_mac_addr[i + 1] = (u8) (eeprom_data >> 8);
4095 switch (hw->mac_type) {
4101 hw->perm_mac_addr[5] ^= 0x01;
4106 hw->mac_addr[i] = hw->perm_mac_addr[i];
4112 * @hw: Struct containing variables accessed by shared code
4118 static void e1000_init_rx_addrs(struct e1000_hw *hw)
4128 e1000_rar_set(hw, hw->mac_addr, 0);
4135 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
4137 E1000_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
4144 * @hw: Struct containing variables accessed by shared code
4147 u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
4154 switch (hw->mc_filter_type) {
4183 * @hw: Struct containing variables accessed by shared code
4187 void e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
4198 switch (hw->mac_type) {
4205 E1000_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
4207 E1000_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);
4213 * @hw: Struct containing variables accessed by shared code
4217 void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
4221 if ((hw->mac_type == e1000_82544) && ((offset & 0x1) == 1)) {
4222 temp = E1000_READ_REG_ARRAY(hw, VFTA, (offset - 1));
4223 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value);
4225 E1000_WRITE_REG_ARRAY(hw, VFTA, (offset - 1), temp);
4228 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, value);
4235 * @hw: Struct containing variables accessed by shared code
4237 static void e1000_clear_vfta(struct e1000_hw *hw)
4249 E1000_WRITE_REG_ARRAY(hw, VFTA, offset, vfta_value);
4254 static s32 e1000_id_led_init(struct e1000_hw *hw)
4265 if (hw->mac_type < e1000_82540) {
4271 hw->ledctl_default = ledctl;
4272 hw->ledctl_mode1 = hw->ledctl_default;
4273 hw->ledctl_mode2 = hw->ledctl_default;
4275 if (e1000_read_eeprom(hw, EEPROM_ID_LED_SETTINGS, 1, &eeprom_data) < 0) {
4291 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
4292 hw->ledctl_mode1 |= ledctl_on << (i << 3);
4297 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
4298 hw->ledctl_mode1 |= ledctl_off << (i << 3);
4308 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
4309 hw->ledctl_mode2 |= ledctl_on << (i << 3);
4314 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
4315 hw->ledctl_mode2 |= ledctl_off << (i << 3);
4327 * @hw: Struct containing variables accessed by shared code
4331 s32 e1000_setup_led(struct e1000_hw *hw)
4338 switch (hw->mac_type) {
4350 ret_val = e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO,
4351 &hw->phy_spd_default);
4354 ret_val = e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
4355 (u16) (hw->phy_spd_default &
4361 if (hw->media_type == e1000_media_type_fiber) {
4364 hw->ledctl_default = ledctl;
4372 } else if (hw->media_type == e1000_media_type_copper)
4373 ew32(LEDCTL, hw->ledctl_mode1);
4382 * @hw: Struct containing variables accessed by shared code
4384 s32 e1000_cleanup_led(struct e1000_hw *hw)
4390 switch (hw->mac_type) {
4402 ret_val = e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
4403 hw->phy_spd_default);
4409 ew32(LEDCTL, hw->ledctl_default);
4418 * @hw: Struct containing variables accessed by shared code
4420 s32 e1000_led_on(struct e1000_hw *hw)
4426 switch (hw->mac_type) {
4435 if (hw->media_type == e1000_media_type_fiber) {
4446 if (hw->media_type == e1000_media_type_fiber) {
4450 } else if (hw->media_type == e1000_media_type_copper) {
4451 ew32(LEDCTL, hw->ledctl_mode2);
4464 * @hw: Struct containing variables accessed by shared code
4466 s32 e1000_led_off(struct e1000_hw *hw)
4472 switch (hw->mac_type) {
4481 if (hw->media_type == e1000_media_type_fiber) {
4492 if (hw->media_type == e1000_media_type_fiber) {
4496 } else if (hw->media_type == e1000_media_type_copper) {
4497 ew32(LEDCTL, hw->ledctl_mode1);
4510 * @hw: Struct containing variables accessed by shared code
4512 static void e1000_clear_hw_cntrs(struct e1000_hw *hw)
4570 if (hw->mac_type < e1000_82543)
4580 if (hw->mac_type <= e1000_82544)
4590 * @hw: Struct containing variables accessed by shared code
4593 * hw->ifs_params_forced to true. However, you must initialize hw->
4597 void e1000_reset_adaptive(struct e1000_hw *hw)
4601 if (hw->adaptive_ifs) {
4602 if (!hw->ifs_params_forced) {
4603 hw->current_ifs_val = 0;
4604 hw->ifs_min_val = IFS_MIN;
4605 hw->ifs_max_val = IFS_MAX;
4606 hw->ifs_step_size = IFS_STEP;
4607 hw->ifs_ratio = IFS_RATIO;
4609 hw->in_ifs_mode = false;
4618 * @hw: Struct containing variables accessed by shared code
4625 void e1000_update_adaptive(struct e1000_hw *hw)
4629 if (hw->adaptive_ifs) {
4630 if ((hw->collision_delta *hw->ifs_ratio) > hw->tx_packet_delta) {
4631 if (hw->tx_packet_delta > MIN_NUM_XMITS) {
4632 hw->in_ifs_mode = true;
4633 if (hw->current_ifs_val < hw->ifs_max_val) {
4634 if (hw->current_ifs_val == 0)
4635 hw->current_ifs_val =
4636 hw->ifs_min_val;
4638 hw->current_ifs_val +=
4639 hw->ifs_step_size;
4640 ew32(AIT, hw->current_ifs_val);
4644 if (hw->in_ifs_mode
4645 && (hw->tx_packet_delta <= MIN_NUM_XMITS)) {
4646 hw->current_ifs_val = 0;
4647 hw->in_ifs_mode = false;
4658 * @hw: Struct containing variables accessed by shared code
4664 void e1000_tbi_adjust_stats(struct e1000_hw *hw, struct e1000_hw_stats *stats,
4703 if (frame_len == hw->max_frame_size) {
4736 * @hw: Struct containing variables accessed by shared code
4740 void e1000_get_bus_info(struct e1000_hw *hw)
4744 switch (hw->mac_type) {
4747 hw->bus_type = e1000_bus_type_pci;
4748 hw->bus_speed = e1000_bus_speed_unknown;
4749 hw->bus_width = e1000_bus_width_unknown;
4753 hw->bus_type = (status & E1000_STATUS_PCIX_MODE) ?
4756 if (hw->device_id == E1000_DEV_ID_82546EB_QUAD_COPPER) {
4757 hw->bus_speed = (hw->bus_type == e1000_bus_type_pci) ?
4759 } else if (hw->bus_type == e1000_bus_type_pci) {
4760 hw->bus_speed = (status & E1000_STATUS_PCI66) ?
4765 hw->bus_speed = e1000_bus_speed_66;
4768 hw->bus_speed = e1000_bus_speed_100;
4771 hw->bus_speed = e1000_bus_speed_133;
4774 hw->bus_speed = e1000_bus_speed_reserved;
4778 hw->bus_width = (status & E1000_STATUS_BUS64) ?
4786 * @hw: Struct containing variables accessed by shared code
4793 static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value)
4795 unsigned long io_addr = hw->io_base;
4796 unsigned long io_data = hw->io_base + 4;
4798 e1000_io_write(hw, io_addr, offset);
4799 e1000_io_write(hw, io_data, value);
4804 * @hw: Struct containing variables accessed by shared code
4816 static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
4829 if (hw->phy_type == e1000_phy_m88) {
4831 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
4864 } else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */
4877 e1000_read_phy_reg(hw, agc_reg_array[i], &phy_data);
4922 * @hw: Struct containing variables accessed by shared code
4935 static s32 e1000_check_polarity(struct e1000_hw *hw,
4943 if (hw->phy_type == e1000_phy_m88) {
4945 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
4953 } else if (hw->phy_type == e1000_phy_igp) {
4955 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS,
4967 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG,
4990 * @hw: Struct containing variables accessed by shared code
5002 static s32 e1000_check_downshift(struct e1000_hw *hw)
5009 if (hw->phy_type == e1000_phy_igp) {
5010 ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH,
5015 hw->speed_downgraded =
5017 } else if (hw->phy_type == e1000_phy_m88) {
5018 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS,
5023 hw->speed_downgraded = (phy_data & M88E1000_PSSR_DOWNSHIFT) >>
5032 * @hw: Struct containing variables accessed by shared code
5042 static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
5056 if (hw->phy_type != e1000_phy_igp)
5060 ret_val = e1000_get_speed_and_duplex(hw, &speed, &duplex);
5069 e1000_get_cable_length(hw, &min_length,
5074 if ((hw->dsp_config_state == e1000_dsp_config_enabled)
5079 e1000_read_phy_reg(hw,
5089 e1000_write_phy_reg(hw,
5095 hw->dsp_config_state =
5099 if ((hw->ffe_config_state == e1000_ffe_config_enabled)
5108 e1000_read_phy_reg(hw, PHY_1000T_STATUS,
5116 e1000_read_phy_reg(hw,
5128 hw->ffe_config_state =
5132 e1000_write_phy_reg(hw,
5147 if (hw->dsp_config_state == e1000_dsp_config_activated) {
5151 e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);
5157 ret_val = e1000_write_phy_reg(hw, 0x2F5B, 0x0003);
5164 ret_val = e1000_write_phy_reg(hw, 0x0000,
5170 e1000_read_phy_reg(hw, dsp_reg_array[i],
5179 e1000_write_phy_reg(hw, dsp_reg_array[i],
5185 ret_val = e1000_write_phy_reg(hw, 0x0000,
5194 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);
5199 hw->dsp_config_state = e1000_dsp_config_enabled;
5202 if (hw->ffe_config_state == e1000_ffe_config_active) {
5206 e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);
5212 ret_val = e1000_write_phy_reg(hw, 0x2F5B, 0x0003);
5219 ret_val = e1000_write_phy_reg(hw, 0x0000,
5224 e1000_write_phy_reg(hw, IGP01E1000_PHY_DSP_FFE,
5229 ret_val = e1000_write_phy_reg(hw, 0x0000,
5238 e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);
5243 hw->ffe_config_state = e1000_ffe_config_enabled;
5251 * @hw: Struct containing variables accessed by shared code
5257 static s32 e1000_set_phy_mode(struct e1000_hw *hw)
5264 if ((hw->mac_type == e1000_82545_rev_3) &&
5265 (hw->media_type == e1000_media_type_copper)) {
5267 e1000_read_eeprom(hw, EEPROM_PHY_CLASS_WORD, 1,
5276 e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT,
5281 e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL,
5286 hw->phy_reset_disable = false;
5295 * @hw: Struct containing variables accessed by shared code
5306 static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active)
5312 if (hw->phy_type != e1000_phy_igp)
5318 if (hw->mac_type == e1000_82541_rev_2
5319 || hw->mac_type == e1000_82547_rev_2) {
5321 e1000_read_phy_reg(hw, IGP01E1000_GMII_FIFO, &phy_data);
5327 if (hw->mac_type == e1000_82541_rev_2 ||
5328 hw->mac_type == e1000_82547_rev_2) {
5331 e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
5341 if (hw->smart_speed == e1000_smart_speed_on) {
5343 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5350 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5354 } else if (hw->smart_speed == e1000_smart_speed_off) {
5356 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5363 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5368 } else if ((hw->autoneg_advertised == AUTONEG_ADVERTISE_SPEED_DEFAULT)
5369 || (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_ALL)
5370 || (hw->autoneg_advertised ==
5373 if (hw->mac_type == e1000_82541_rev_2 ||
5374 hw->mac_type == e1000_82547_rev_2) {
5377 e1000_write_phy_reg(hw, IGP01E1000_GMII_FIFO,
5385 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5392 e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
5403 * @hw: Struct containing variables accessed by shared code
5407 static s32 e1000_set_vco_speed(struct e1000_hw *hw)
5415 switch (hw->mac_type) {
5426 e1000_read_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, &default_page);
5430 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
5434 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
5439 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
5445 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004);
5449 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
5454 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
5459 e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, default_page);
5469 * @hw: Struct containing variables accessed by shared code
5474 u32 e1000_enable_mng_pass_thru(struct e1000_hw *hw)
5478 if (hw->asf_firmware_present) {
5490 static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw)
5499 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
5502 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
5506 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
5516 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
5520 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
5534 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
5538 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
5542 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
5546 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
5550 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
5560 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
5564 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg);
5577 * @hw: Struct containing variables accessed by shared code
5583 static s32 e1000_get_auto_rd_done(struct e1000_hw *hw)
5592 * @hw: Struct containing variables accessed by shared code
5598 static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw)