Lines Matching refs:module
44 * The Scatter Gather Engine (SGE), Multiport Support module (MPS), PIO Local
45 * bus module (PL) and CPU Interface Module (CIM) components are mapped via
74 * This table allows us to map subsets of the various module register sets
76 * module whose registers are being mapped, the offset within the module's
78 * and the offset within the T4VF Register Map to which the module's registers
84 #define T4VF_MOD_MAP(module, index, first, last) \
85 T4VF_MOD_MAP_##module##_INDEX = (index), \
86 T4VF_MOD_MAP_##module##_FIRST = (first), \
87 T4VF_MOD_MAP_##module##_LAST = (last), \
88 T4VF_MOD_MAP_##module##_OFFSET = ((first)/4), \
89 T4VF_MOD_MAP_##module##_BASE = \
90 (T4VF_##module##_BASE_ADDR/4 + (first)/4), \
91 T4VF_MOD_MAP_##module##_LIMIT = \
92 (T4VF_##module##_BASE_ADDR/4 + (last)/4),