Lines Matching defs:reg_esr
175 u32 reg_esr;
204 u32 reg_esr)
207 (reg_esr & FLEXCAN_ESR_ERR_BUS);
290 struct can_frame *cf, u32 reg_esr)
297 if (reg_esr & FLEXCAN_ESR_BIT1_ERR) {
302 if (reg_esr & FLEXCAN_ESR_BIT0_ERR) {
307 if (reg_esr & FLEXCAN_ESR_ACK_ERR) {
313 if (reg_esr & FLEXCAN_ESR_CRC_ERR) {
319 if (reg_esr & FLEXCAN_ESR_FRM_ERR) {
324 if (reg_esr & FLEXCAN_ESR_STF_ERR) {
337 static int flexcan_poll_bus_err(struct net_device *dev, u32 reg_esr)
346 do_bus_err(dev, cf, reg_esr);
421 static int flexcan_poll_state(struct net_device *dev, u32 reg_esr)
429 flt = reg_esr & FLEXCAN_ESR_FLT_CONF_MASK;
431 if (likely(!(reg_esr & (FLEXCAN_ESR_TX_WRN |
512 u32 reg_iflag1, reg_esr;
519 reg_esr = readl(®s->esr) | priv->reg_esr;
522 work_done += flexcan_poll_state(dev, reg_esr);
533 if (flexcan_has_and_handle_berr(priv, reg_esr) && work_done < quota)
534 work_done += flexcan_poll_bus_err(dev, reg_esr);
552 u32 reg_iflag1, reg_esr;
555 reg_esr = readl(®s->esr);
565 (reg_esr & FLEXCAN_ESR_ERR_STATE) ||
566 flexcan_has_and_handle_berr(priv, reg_esr)) {
571 priv->reg_esr = reg_esr & FLEXCAN_ESR_ERR_BUS;