Lines Matching refs:init_crd
725 u32 init_crd, crd;
732 init_crd = REG_RD(bp, PBF_REG_P0_INIT_CRD + port*4);
734 DP(NETIF_MSG_LINK, "init_crd 0x%x crd 0x%x\n", init_crd, crd);
736 while ((init_crd != crd) && count) {
743 if (init_crd != crd) {
744 DP(NETIF_MSG_LINK, "BUG! init_crd 0x%x != crd 0x%x\n",
745 init_crd, crd);
758 init_crd = 778; /* (800-18-4) */
769 init_crd = thresh + 553 - 22;
773 init_crd = thresh + 664 - 22;
777 init_crd = thresh + 742 - 22;
781 init_crd = thresh + 778 - 22;
789 REG_WR(bp, PBF_REG_P0_INIT_CRD + port*4, init_crd);
791 line_speed, init_crd);