Lines Matching defs:aup
151 struct au1000_private *aup = netdev_priv(dev);
153 spin_lock_irqsave(&aup->lock, flags);
155 if(force_reset || (!aup->mac_enabled)) {
156 *aup->enable = MAC_EN_CLOCK_ENABLE;
158 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
162 aup->mac_enabled = 1;
165 spin_unlock_irqrestore(&aup->lock, flags);
173 struct au1000_private *aup = netdev_priv(dev);
174 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
175 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
206 struct au1000_private *aup = netdev_priv(dev);
207 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
208 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
260 struct au1000_private *aup = netdev_priv(dev);
262 netif_dbg(aup, drv, dev, "hard stop\n");
264 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
270 struct au1000_private *aup = netdev_priv(dev);
272 netif_dbg(aup, hw, dev, "enable_rx_tx\n");
274 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
281 struct au1000_private *aup = netdev_priv(dev);
282 struct phy_device *phydev = aup->phy_dev;
287 BUG_ON(!aup->phy_dev);
289 spin_lock_irqsave(&aup->lock, flags);
291 if (phydev->link && (aup->old_speed != phydev->speed)) {
304 aup->old_speed = phydev->speed;
309 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
316 aup->mac->control = ((aup->mac->control
320 aup->mac->control = ((aup->mac->control
326 aup->old_duplex = phydev->duplex;
331 if (phydev->link != aup->old_link) {
336 aup->old_speed = 0;
337 aup->old_duplex = -1;
340 aup->old_link = phydev->link;
344 spin_unlock_irqrestore(&aup->lock, flags);
358 struct au1000_private *const aup = netdev_priv(dev);
361 if (aup->phy_static_config) {
362 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
364 if (aup->phy_addr)
365 phydev = aup->mii_bus->phy_map[aup->phy_addr];
374 if (aup->mii_bus->phy_map[phy_addr]) {
375 phydev = aup->mii_bus->phy_map[phy_addr];
376 if (!aup->phy_search_highest_addr)
380 if (aup->phy1_search_mac0) {
382 if (!phydev && (aup->mac_id == 1)) {
391 aup->mii_bus->phy_map[phy_addr];
393 if (aup->mac_id == 1)
437 aup->old_link = 0;
438 aup->old_speed = 0;
439 aup->old_duplex = -1;
440 aup->phy_dev = phydev;
455 static db_dest_t *au1000_GetFreeDB(struct au1000_private *aup)
458 pDB = aup->pDBfree;
461 aup->pDBfree = pDB->pnext;
466 void au1000_ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
468 db_dest_t *pDBfree = aup->pDBfree;
471 aup->pDBfree = pDB;
476 struct au1000_private *const aup = netdev_priv(dev);
481 *aup->enable = MAC_EN_CLOCK_ENABLE;
483 *aup->enable = 0;
486 aup->tx_full = 0;
489 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
493 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
496 aup->mac_enabled = 0;
502 struct au1000_private *const aup = netdev_priv(dev);
505 netif_dbg(aup, hw, dev, "reset mac, aup %x\n",
506 (unsigned)aup);
508 spin_lock_irqsave(&aup->lock, flags);
512 spin_unlock_irqrestore(&aup->lock, flags);
521 au1000_setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
526 aup->rx_dma_ring[i] =
530 aup->tx_dma_ring[i] =
541 struct au1000_private *aup = netdev_priv(dev);
543 if (aup->phy_dev)
544 return phy_ethtool_gset(aup->phy_dev, cmd);
551 struct au1000_private *aup = netdev_priv(dev);
556 if (aup->phy_dev)
557 return phy_ethtool_sset(aup->phy_dev, cmd);
565 struct au1000_private *aup = netdev_priv(dev);
570 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
576 struct au1000_private *aup = netdev_priv(dev);
577 aup->msg_enable = value;
582 struct au1000_private *aup = netdev_priv(dev);
583 return aup->msg_enable;
607 struct au1000_private *aup = netdev_priv(dev);
612 netif_dbg(aup, hw, dev, "au1000_init\n");
617 spin_lock_irqsave(&aup->lock, flags);
619 aup->mac->control = 0;
620 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
621 aup->tx_tail = aup->tx_head;
622 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
624 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
625 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
629 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
637 if (aup->phy_dev) {
638 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
646 aup->mac->control = control;
647 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
650 spin_unlock_irqrestore(&aup->lock, flags);
682 struct au1000_private *aup = netdev_priv(dev);
689 netif_dbg(aup, rx_status, dev, "au1000_rx head %d\n", aup->rx_head);
691 prxd = aup->rx_dma_ring[aup->rx_head];
695 pDB = aup->rx_db_inuse[aup->rx_head];
737 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
741 prxd = aup->rx_dma_ring[aup->rx_head];
749 struct au1000_private *aup = netdev_priv(dev);
753 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
776 struct au1000_private *aup = netdev_priv(dev);
779 ptxd = aup->tx_dma_ring[aup->tx_tail];
787 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
788 ptxd = aup->tx_dma_ring[aup->tx_tail];
790 if (aup->tx_full) {
791 aup->tx_full = 0;
814 struct au1000_private *aup = netdev_priv(dev);
816 netif_dbg(aup, drv, dev, "open: dev=%p\n", dev);
832 if (aup->phy_dev) {
834 aup->phy_dev->state = PHY_CHANGELINK;
835 phy_start(aup->phy_dev);
840 netif_dbg(aup, drv, dev, "open: Initialization done.\n");
848 struct au1000_private *const aup = netdev_priv(dev);
850 netif_dbg(aup, drv, dev, "close: dev=%p\n", dev);
852 if (aup->phy_dev)
853 phy_stop(aup->phy_dev);
855 spin_lock_irqsave(&aup->lock, flags);
864 spin_unlock_irqrestore(&aup->lock, flags);
874 struct au1000_private *aup = netdev_priv(dev);
881 netif_dbg(aup, tx_queued, dev, "tx: aup %x len=%d, data=%p, head %d\n",
882 (unsigned)aup, skb->len,
883 skb->data, aup->tx_head);
885 ptxd = aup->tx_dma_ring[aup->tx_head];
890 aup->tx_full = 1;
897 if (aup->tx_full) {
898 aup->tx_full = 0;
902 pDB = aup->tx_db_inuse[aup->tx_head];
918 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
937 struct au1000_private *aup = netdev_priv(dev);
939 netif_dbg(aup, drv, dev, "au1000_multicast_list: flags=%x\n", dev->flags);
942 aup->mac->control |= MAC_PROMISCUOUS;
945 aup->mac->control |= MAC_PASS_ALL_MULTI;
946 aup->mac->control &= ~MAC_PROMISCUOUS;
956 aup->mac->multi_hash_high = mc_filter[1];
957 aup->mac->multi_hash_low = mc_filter[0];
958 aup->mac->control &= ~MAC_PROMISCUOUS;
959 aup->mac->control |= MAC_HASH_MODE;
965 struct au1000_private *aup = netdev_priv(dev);
970 if (!aup->phy_dev)
973 return phy_mii_ioctl(aup->phy_dev, rq, cmd);
991 struct au1000_private *aup = NULL;
1040 aup = netdev_priv(dev);
1042 spin_lock_init(&aup->lock);
1043 aup->msg_enable = (au1000_debug < 4 ? AU1000_DEF_MSG_ENABLE : au1000_debug);
1047 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
1049 &aup->dma_addr, 0);
1050 if (!aup->vaddr) {
1056 /* aup->mac is the base address of the MAC's registers */
1057 aup->mac = (volatile mac_reg_t *)ioremap_nocache(base->start, resource_size(base));
1058 if (!aup->mac) {
1065 aup->enable = (volatile u32 *)ioremap_nocache(macen->start, resource_size(macen));
1066 if (!aup->enable) {
1071 aup->mac_id = pdev->id;
1074 au1000_setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
1076 au1000_setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
1081 *aup->enable = 0;
1082 aup->mac_enabled = 0;
1087 aup->phy1_search_mac0 = 1;
1092 aup->phy_static_config = pd->phy_static_config;
1093 aup->phy_search_highest_addr = pd->phy_search_highest_addr;
1094 aup->phy1_search_mac0 = pd->phy1_search_mac0;
1095 aup->phy_addr = pd->phy_addr;
1096 aup->phy_busid = pd->phy_busid;
1097 aup->phy_irq = pd->phy_irq;
1100 if (aup->phy_busid && aup->phy_busid > 0) {
1107 aup->mii_bus = mdiobus_alloc();
1108 if (aup->mii_bus == NULL) {
1114 aup->mii_bus->priv = dev;
1115 aup->mii_bus->read = au1000_mdiobus_read;
1116 aup->mii_bus->write = au1000_mdiobus_write;
1117 aup->mii_bus->reset = au1000_mdiobus_reset;
1118 aup->mii_bus->name = "au1000_eth_mii";
1119 snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%x", aup->mac_id);
1120 aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1121 if (aup->mii_bus->irq == NULL)
1125 aup->mii_bus->irq[i] = PHY_POLL;
1127 if (aup->phy_static_config)
1128 if (aup->phy_irq && aup->phy_busid == aup->mac_id)
1129 aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq;
1131 err = mdiobus_register(aup->mii_bus);
1142 pDB = aup->db;
1146 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
1150 aup->pDBfree = pDBfree;
1153 pDB = au1000_GetFreeDB(aup);
1157 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1158 aup->rx_db_inuse[i] = pDB;
1161 pDB = au1000_GetFreeDB(aup);
1165 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1166 aup->tx_dma_ring[i]->len = 0;
1167 aup->tx_db_inuse[i] = pDB;
1196 if (aup->mii_bus != NULL)
1197 mdiobus_unregister(aup->mii_bus);
1199 /* here we should have a valid dev plus aup-> register addresses
1204 if (aup->rx_db_inuse[i])
1205 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1208 if (aup->tx_db_inuse[i])
1209 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1212 mdiobus_free(aup->mii_bus);
1214 iounmap(aup->enable);
1216 iounmap(aup->mac);
1219 (void *)aup->vaddr, aup->dma_addr);
1233 struct au1000_private *aup = netdev_priv(dev);
1240 mdiobus_unregister(aup->mii_bus);
1241 mdiobus_free(aup->mii_bus);
1244 if (aup->rx_db_inuse[i])
1245 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1248 if (aup->tx_db_inuse[i])
1249 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1253 (void *)aup->vaddr, aup->dma_addr);
1255 iounmap(aup->mac);
1256 iounmap(aup->enable);