Lines Matching refs:fun
59 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
61 if (gpio_get_value(fun->rnb_gpio[fun->mchip_number]))
64 dev_vdbg(fun->dev, "busy\n");
68 static void fun_wait_rnb(struct fsl_upm_nand *fun)
70 if (fun->rnb_gpio[fun->mchip_number] >= 0) {
73 while (--cnt && !fun_chip_ready(&fun->mtd))
76 dev_err(fun->dev, "tired waiting for RNB\n");
85 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
88 if (!(ctrl & fun->last_ctrl)) {
89 fsl_upm_end_pattern(&fun->upm);
94 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
99 fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
101 fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
104 mar = (cmd << (32 - fun->upm.width)) |
105 fun->mchip_offsets[fun->mchip_number];
106 fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
108 if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
109 fun_wait_rnb(fun);
115 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
120 fun->mchip_number = mchip_nr;
121 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
130 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
132 return in_8(fun->chip.IO_ADDR_R);
137 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
141 buf[i] = in_8(fun->chip.IO_ADDR_R);
146 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
150 out_8(fun->chip.IO_ADDR_W, buf[i]);
151 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
152 fun_wait_rnb(fun);
154 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
155 fun_wait_rnb(fun);
158 static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
168 fun->chip.IO_ADDR_R = fun->io_base;
169 fun->chip.IO_ADDR_W = fun->io_base;
170 fun->chip.cmd_ctrl = fun_cmd_ctrl;
171 fun->chip.chip_delay = fun->chip_delay;
172 fun->chip.read_byte = fun_read_byte;
173 fun->chip.read_buf = fun_read_buf;
174 fun->chip.write_buf = fun_write_buf;
175 fun->chip.ecc.mode = NAND_ECC_SOFT;
176 if (fun->mchip_count > 1)
177 fun->chip.select_chip = fun_select_chip;
179 if (fun->rnb_gpio[0] >= 0)
180 fun->chip.dev_ready = fun_chip_ready;
182 fun->mtd.priv = &fun->chip;
183 fun->mtd.owner = THIS_MODULE;
189 fun->mtd.name = kasprintf(GFP_KERNEL, "%x.%s", io_res->start,
191 if (!fun->mtd.name) {
196 ret = nand_scan(&fun->mtd, fun->mchip_count);
201 ret = parse_mtd_partitions(&fun->mtd, part_types, &fun->parts, 0);
205 ret = of_mtd_parse_partitions(fun->dev, flash_np, &fun->parts);
211 ret = add_mtd_partitions(&fun->mtd, fun->parts, ret);
214 ret = add_mtd_device(&fun->mtd);
223 struct fsl_upm_nand *fun;
231 fun = kzalloc(sizeof(*fun), GFP_KERNEL);
232 if (!fun)
241 ret = fsl_upm_find(io_res.start, &fun->upm);
254 fun->upm_addr_offset = *prop;
262 fun->upm_cmd_offset = *prop;
267 fun->mchip_count = size / sizeof(uint32_t);
268 if (fun->mchip_count >= NAND_MAX_CHIPS) {
272 for (i = 0; i < fun->mchip_count; i++)
273 fun->mchip_offsets[i] = prop[i];
275 fun->mchip_count = 1;
278 for (i = 0; i < fun->mchip_count; i++) {
279 fun->rnb_gpio[i] = -1;
289 fun->rnb_gpio[i] = rnb_gpio;
298 fun->chip_delay = *prop;
300 fun->chip_delay = 50;
304 fun->wait_flags = *prop;
306 fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
309 fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
311 if (!fun->io_base) {
316 fun->dev = &ofdev->dev;
317 fun->last_ctrl = NAND_CLE;
319 ret = fun_chip_init(fun, ofdev->dev.of_node, &io_res);
323 dev_set_drvdata(&ofdev->dev, fun);
327 for (i = 0; i < fun->mchip_count; i++) {
328 if (fun->rnb_gpio[i] < 0)
330 gpio_free(fun->rnb_gpio[i]);
333 kfree(fun);
340 struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
343 nand_release(&fun->mtd);
344 kfree(fun->mtd.name);
346 for (i = 0; i < fun->mchip_count; i++) {
347 if (fun->rnb_gpio[i] < 0)
349 gpio_free(fun->rnb_gpio[i]);
352 kfree(fun);