Lines Matching refs:iowrite32
139 iowrite32(address, denali->flash_mem);
140 iowrite32(data, denali->flash_mem + 0x10);
147 iowrite32(address, denali->flash_mem);
190 iowrite32(bank, denali->flash_reg + DEVICE_RESET);
207 iowrite32(reset_complete[i] | operation_timeout[i],
211 iowrite32(device_reset_banks[i],
224 iowrite32(reset_complete[i] | operation_timeout[i],
322 iowrite32(acc_clks, denali->flash_reg + ACC_CLKS);
323 iowrite32(re_2_we, denali->flash_reg + RE_2_WE);
324 iowrite32(re_2_re, denali->flash_reg + RE_2_RE);
325 iowrite32(we_2_re, denali->flash_reg + WE_2_RE);
326 iowrite32(addr_2_data, denali->flash_reg + ADDR_2_DATA);
327 iowrite32(en_lo, denali->flash_reg + RDWR_EN_LO_CNT);
328 iowrite32(en_hi, denali->flash_reg + RDWR_EN_HI_CNT);
329 iowrite32(cs_cnt, denali->flash_reg + CS_SETUP_CNT);
353 /* iowrite32(1, denali->flash_reg + CACHE_WRITE_ENABLE); */
354 /* iowrite32(1, denali->flash_reg + CACHE_READ_ENABLE); */
364 iowrite32(5, denali->flash_reg + ACC_CLKS);
365 iowrite32(20, denali->flash_reg + RE_2_WE);
366 iowrite32(12, denali->flash_reg + WE_2_RE);
367 iowrite32(14, denali->flash_reg + ADDR_2_DATA);
368 iowrite32(3, denali->flash_reg + RDWR_EN_LO_CNT);
369 iowrite32(2, denali->flash_reg + RDWR_EN_HI_CNT);
370 iowrite32(2, denali->flash_reg + CS_SETUP_CNT);
381 iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
384 iowrite32(tmp,
387 iowrite32(15, denali->flash_reg + ECC_CORRECTION);
389 iowrite32(8, denali->flash_reg + ECC_CORRECTION);
402 iowrite32(128, denali->flash_reg + PAGES_PER_BLOCK);
403 iowrite32(4096, denali->flash_reg + DEVICE_MAIN_AREA_SIZE);
404 iowrite32(224, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
409 iowrite32(main_size,
411 iowrite32(spare_size,
413 iowrite32(0, denali->flash_reg + DEVICE_WIDTH);
415 iowrite32(15, denali->flash_reg + ECC_CORRECTION);
417 iowrite32(8, denali->flash_reg + ECC_CORRECTION);
566 iowrite32(1, denali->flash_reg + GLOBAL_INT_ENABLE);
568 iowrite32(0, denali->flash_reg + GLOBAL_INT_ENABLE);
589 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS0);
590 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS1);
591 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS2);
592 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS3);
606 iowrite32(int_mask, denali->flash_reg + INTR_EN0);
607 iowrite32(int_mask, denali->flash_reg + INTR_EN1);
608 iowrite32(int_mask, denali->flash_reg + INTR_EN2);
609 iowrite32(int_mask, denali->flash_reg + INTR_EN3);
628 iowrite32(irq_mask, denali->flash_reg + intr_status_reg);
737 iowrite32(ecc_en_flag, denali->flash_reg + ECC_ENABLE);
738 iowrite32(transfer_spare_flag,
771 iowrite32(cmd, denali->flash_mem);
778 iowrite32(cmd, denali->flash_mem);
790 iowrite32(cmd, denali->flash_mem);
809 iowrite32(cmd, denali->flash_mem);
830 iowrite32(*buf32++, denali->flash_mem + 0x10);
1013 iowrite32(reg_val, denali->flash_reg + DMA_ENABLE);
1367 iowrite32(0x0F, denali->flash_reg + RB_PIN_ENABLED);
1368 iowrite32(CHIP_EN_DONT_CARE__FLAG,
1371 iowrite32(0xffff, denali->flash_reg + SPARE_AREA_MARKER);
1374 iowrite32(0, denali->flash_reg + TWO_ROW_ADDR_CYCLES);
1375 iowrite32(1, denali->flash_reg + ECC_ENABLE);
1612 iowrite32(15, denali->flash_reg + ECC_CORRECTION);
1622 iowrite32(8, denali->flash_reg + ECC_CORRECTION);