Lines Matching defs:flash
2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
34 #include <linux/spi/flash.h>
45 #define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */
104 static int read_sr(struct m25p *flash)
110 retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
113 dev_err(&flash->spi->dev, "error %d reading SR\n",
125 static int write_sr(struct m25p *flash, u8 val)
127 flash->command[0] = OPCODE_WRSR;
128 flash->command[1] = val;
130 return spi_write(flash->spi, flash->command, 2);
137 static inline int write_enable(struct m25p *flash)
141 return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
147 static inline int write_disable(struct m25p *flash)
151 return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
158 static int wait_till_ready(struct m25p *flash)
166 if ((sr = read_sr(flash)) < 0)
179 * Erase the whole flash memory
183 static int erase_chip(struct m25p *flash)
186 dev_name(&flash->spi->dev), __func__,
187 (long long)(flash->mtd.size >> 10));
190 if (wait_till_ready(flash))
194 write_enable(flash);
197 flash->command[0] = OPCODE_CHIP_ERASE;
199 spi_write(flash->spi, flash->command, 1);
204 static void m25p_addr2cmd(struct m25p *flash, unsigned int addr, u8 *cmd)
207 cmd[1] = addr >> (flash->addr_width * 8 - 8);
208 cmd[2] = addr >> (flash->addr_width * 8 - 16);
209 cmd[3] = addr >> (flash->addr_width * 8 - 24);
212 static int m25p_cmdsz(struct m25p *flash)
214 return 1 + flash->addr_width;
218 * Erase one sector of flash memory at offset ``offset'' which is any
223 static int erase_sector(struct m25p *flash, u32 offset)
226 dev_name(&flash->spi->dev), __func__,
227 flash->mtd.erasesize / 1024, offset);
230 if (wait_till_ready(flash))
234 write_enable(flash);
237 flash->command[0] = flash->erase_opcode;
238 m25p_addr2cmd(flash, offset, flash->command);
240 spi_write(flash->spi, flash->command, m25p_cmdsz(flash));
252 * Erase an address range on the flash chip. The address range may extend
257 struct m25p *flash = mtd_to_m25p(mtd);
262 dev_name(&flash->spi->dev), __func__, "at",
266 if (instr->addr + instr->len > flash->mtd.size)
275 mutex_lock(&flash->lock);
278 if (len == flash->mtd.size) {
279 if (erase_chip(flash)) {
281 mutex_unlock(&flash->lock);
293 if (erase_sector(flash, addr)) {
295 mutex_unlock(&flash->lock);
304 mutex_unlock(&flash->lock);
313 * Read an address range from the flash chip. The address range
319 struct m25p *flash = mtd_to_m25p(mtd);
324 dev_name(&flash->spi->dev), __func__, "from",
331 if (from + len > flash->mtd.size)
341 t[0].tx_buf = flash->command;
342 t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE;
352 mutex_lock(&flash->lock);
355 if (wait_till_ready(flash)) {
357 mutex_unlock(&flash->lock);
363 flash->command[0] = OPCODE_READ;
364 m25p_addr2cmd(flash, from, flash->command);
366 spi_sync(flash->spi, &m);
368 *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
370 mutex_unlock(&flash->lock);
376 * Write an address range to the flash chip. Data must be written in
383 struct m25p *flash = mtd_to_m25p(mtd);
389 dev_name(&flash->spi->dev), __func__, "to",
398 if (to + len > flash->mtd.size)
404 t[0].tx_buf = flash->command;
405 t[0].len = m25p_cmdsz(flash);
411 mutex_lock(&flash->lock);
414 if (wait_till_ready(flash)) {
415 mutex_unlock(&flash->lock);
419 write_enable(flash);
422 flash->command[0] = OPCODE_PP;
423 m25p_addr2cmd(flash, to, flash->command);
425 page_offset = to & (flash->page_size - 1);
428 if (page_offset + len <= flash->page_size) {
431 spi_sync(flash->spi, &m);
433 *retlen = m.actual_length - m25p_cmdsz(flash);
438 page_size = flash->page_size - page_offset;
441 spi_sync(flash->spi, &m);
443 *retlen = m.actual_length - m25p_cmdsz(flash);
445 /* write everything in flash->page_size chunks */
448 if (page_size > flash->page_size)
449 page_size = flash->page_size;
451 /* write the next page to flash */
452 m25p_addr2cmd(flash, to + i, flash->command);
457 wait_till_ready(flash);
459 write_enable(flash);
461 spi_sync(flash->spi, &m);
463 *retlen += m.actual_length - m25p_cmdsz(flash);
467 mutex_unlock(&flash->lock);
475 struct m25p *flash = mtd_to_m25p(mtd);
487 if (to + len > flash->mtd.size)
493 t[0].tx_buf = flash->command;
494 t[0].len = m25p_cmdsz(flash);
500 mutex_lock(&flash->lock);
503 ret = wait_till_ready(flash);
507 write_enable(flash);
512 flash->command[0] = OPCODE_BP;
513 m25p_addr2cmd(flash, to, flash->command);
517 spi_sync(flash->spi, &m);
518 ret = wait_till_ready(flash);
521 *retlen += m.actual_length - m25p_cmdsz(flash);
525 flash->command[0] = OPCODE_AAI_WP;
526 m25p_addr2cmd(flash, to, flash->command);
529 cmd_sz = m25p_cmdsz(flash);
536 spi_sync(flash->spi, &m);
537 ret = wait_till_ready(flash);
544 write_disable(flash);
545 ret = wait_till_ready(flash);
551 write_enable(flash);
552 flash->command[0] = OPCODE_BP;
553 m25p_addr2cmd(flash, to, flash->command);
554 t[0].len = m25p_cmdsz(flash);
558 spi_sync(flash->spi, &m);
559 ret = wait_till_ready(flash);
562 *retlen += m.actual_length - m25p_cmdsz(flash);
563 write_disable(flash);
567 mutex_unlock(&flash->lock);
620 * more flash chips. This current list focusses on newer chips, which
772 struct m25p *flash;
821 flash = kzalloc(sizeof *flash, GFP_KERNEL);
822 if (!flash)
824 flash->command = kmalloc(MAX_CMD_SIZE + FAST_READ_DUMMY_BYTE, GFP_KERNEL);
825 if (!flash->command) {
826 kfree(flash);
830 flash->spi = spi;
831 mutex_init(&flash->lock);
832 dev_set_drvdata(&spi->dev, flash);
835 * Atmel, SST and Intel/Numonyx serial flash tend to power
842 write_enable(flash);
843 write_sr(flash, 0);
847 flash->mtd.name = data->name;
849 flash->mtd.name = dev_name(&spi->dev);
851 flash->mtd.type = MTD_NORFLASH;
852 flash->mtd.writesize = 1;
853 flash->mtd.flags = MTD_CAP_NORFLASH;
854 flash->mtd.size = info->sector_size * info->n_sectors;
855 flash->mtd.erase = m25p80_erase;
856 flash->mtd.read = m25p80_read;
858 /* sst flash chips use AAI word program */
860 flash->mtd.write = sst_write;
862 flash->mtd.write = m25p80_write;
866 flash->erase_opcode = OPCODE_BE_4K;
867 flash->mtd.erasesize = 4096;
869 flash->erase_opcode = OPCODE_SE;
870 flash->mtd.erasesize = info->sector_size;
874 flash->mtd.flags |= MTD_NO_ERASE;
876 flash->mtd.dev.parent = &spi->dev;
877 flash->page_size = info->page_size;
878 flash->addr_width = info->addr_width;
881 (long long)flash->mtd.size >> 10);
886 flash->mtd.name,
887 (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20),
888 flash->mtd.erasesize, flash->mtd.erasesize / 1024,
889 flash->mtd.numeraseregions);
891 if (flash->mtd.numeraseregions)
892 for (i = 0; i < flash->mtd.numeraseregions; i++)
897 i, (long long)flash->mtd.eraseregions[i].offset,
898 flash->mtd.eraseregions[i].erasesize,
899 flash->mtd.eraseregions[i].erasesize / 1024,
900 flash->mtd.eraseregions[i].numblocks);
914 nr_parts = parse_mtd_partitions(&flash->mtd,
933 flash->partitioned = 1;
934 return add_mtd_partitions(&flash->mtd, parts, nr_parts);
940 return add_mtd_device(&flash->mtd) == 1 ? -ENODEV : 0;
946 struct m25p *flash = dev_get_drvdata(&spi->dev);
950 if (mtd_has_partitions() && flash->partitioned)
951 status = del_mtd_partitions(&flash->mtd);
953 status = del_mtd_device(&flash->mtd);
955 kfree(flash->command);
956 kfree(flash);
996 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");