Lines Matching defs:adc
30 #include <linux/jz4740-adc.h>
67 static inline void jz4740_adc_irq_set_masked(struct jz4740_adc *adc, int irq,
73 irq -= adc->irq_base;
75 spin_lock_irqsave(&adc->lock, flags);
77 val = readb(adc->base + JZ_REG_ADC_CTRL);
82 writeb(val, adc->base + JZ_REG_ADC_CTRL);
84 spin_unlock_irqrestore(&adc->lock, flags);
89 struct jz4740_adc *adc = get_irq_chip_data(irq);
90 jz4740_adc_irq_set_masked(adc, irq, true);
95 struct jz4740_adc *adc = get_irq_chip_data(irq);
96 jz4740_adc_irq_set_masked(adc, irq, false);
101 struct jz4740_adc *adc = get_irq_chip_data(irq);
103 irq -= adc->irq_base;
104 writeb(BIT(irq), adc->base + JZ_REG_ADC_STATUS);
108 .name = "jz4740-adc",
116 struct jz4740_adc *adc = get_irq_desc_data(desc);
120 status = readb(adc->base + JZ_REG_ADC_STATUS);
124 generic_handle_irq(adc->irq_base + i);
132 static inline void jz4740_adc_clk_enable(struct jz4740_adc *adc)
134 if (atomic_inc_return(&adc->clk_ref) == 1)
135 clk_enable(adc->clk);
138 static inline void jz4740_adc_clk_disable(struct jz4740_adc *adc)
140 if (atomic_dec_return(&adc->clk_ref) == 0)
141 clk_disable(adc->clk);
144 static inline void jz4740_adc_set_enabled(struct jz4740_adc *adc, int engine,
150 spin_lock_irqsave(&adc->lock, flags);
152 val = readb(adc->base + JZ_REG_ADC_ENABLE);
157 writeb(val, adc->base + JZ_REG_ADC_ENABLE);
159 spin_unlock_irqrestore(&adc->lock, flags);
164 struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent);
166 jz4740_adc_clk_enable(adc);
167 jz4740_adc_set_enabled(adc, pdev->id, true);
174 struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent);
176 jz4740_adc_set_enabled(adc, pdev->id, false);
177 jz4740_adc_clk_disable(adc);
184 struct jz4740_adc *adc = dev_get_drvdata(dev);
188 if (!adc)
191 spin_lock_irqsave(&adc->lock, flags);
193 cfg = readl(adc->base + JZ_REG_ADC_CFG);
198 writel(cfg, adc->base + JZ_REG_ADC_CFG);
200 spin_unlock_irqrestore(&adc->lock, flags);
258 struct jz4740_adc *adc;
262 adc = kmalloc(sizeof(*adc), GFP_KERNEL);
263 if (!adc) {
268 adc->irq = platform_get_irq(pdev, 0);
269 if (adc->irq < 0) {
270 ret = adc->irq;
275 adc->irq_base = platform_get_irq(pdev, 1);
276 if (adc->irq_base < 0) {
277 ret = adc->irq_base;
290 adc->mem = request_mem_region(mem_base->start, JZ_REG_ADC_STATUS,
292 if (!adc->mem) {
298 adc->base = ioremap_nocache(adc->mem->start, resource_size(adc->mem));
299 if (!adc->base) {
305 adc->clk = clk_get(&pdev->dev, "adc");
306 if (IS_ERR(adc->clk)) {
307 ret = PTR_ERR(adc->clk);
312 spin_lock_init(&adc->lock);
313 atomic_set(&adc->clk_ref, 0);
315 platform_set_drvdata(pdev, adc);
317 for (irq = adc->irq_base; irq < adc->irq_base + 5; ++irq) {
318 set_irq_chip_data(irq, adc);
323 set_irq_data(adc->irq, adc);
324 set_irq_chained_handler(adc->irq, jz4740_adc_irq_demux);
326 writeb(0x00, adc->base + JZ_REG_ADC_ENABLE);
327 writeb(0xff, adc->base + JZ_REG_ADC_CTRL);
330 ARRAY_SIZE(jz4740_adc_cells), mem_base, adc->irq_base);
337 clk_put(adc->clk);
340 iounmap(adc->base);
342 release_mem_region(adc->mem->start, resource_size(adc->mem));
344 kfree(adc);
351 struct jz4740_adc *adc = platform_get_drvdata(pdev);
355 set_irq_data(adc->irq, NULL);
356 set_irq_chained_handler(adc->irq, NULL);
358 iounmap(adc->base);
359 release_mem_region(adc->mem->start, resource_size(adc->mem));
361 clk_put(adc->clk);
365 kfree(adc);
374 .name = "jz4740-adc",
394 MODULE_ALIAS("platform:jz4740-adc");