Lines Matching refs:TVP7002_WRITE
52 #define TVP7002_WRITE 1
83 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
84 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
85 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
86 { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
87 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
88 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
89 { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
90 { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
91 { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
92 { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
93 { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
94 { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
95 { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
96 { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
97 { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
98 { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
99 { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
100 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
101 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
103 { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
104 { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
105 { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
106 { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
107 { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
108 { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
109 { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
110 { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
111 { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
112 { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
113 { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
114 { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
115 { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
116 { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
120 { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
122 { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
124 { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
127 { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
128 { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
129 { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
130 { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
131 { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
132 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
136 { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
137 { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
144 { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
146 { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
147 { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
148 { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
149 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
150 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
151 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
152 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
153 { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
154 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
155 { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
156 { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
157 { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
158 { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
159 { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
160 { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
161 { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
162 { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
163 { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
164 { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
165 { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
166 { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
167 { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
168 { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
169 { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
170 { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
171 { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
172 { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
173 { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
174 { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
181 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
182 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
183 { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
184 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
185 { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
186 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
187 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
188 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
189 { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
190 { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
191 { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
192 { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
193 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
194 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
195 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
196 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
197 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
203 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
204 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
205 { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
206 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
207 { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
208 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
209 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
210 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
211 { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
212 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
213 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
214 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
215 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
216 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
217 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
218 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
219 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
225 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
226 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
227 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
228 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
229 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
230 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
231 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
232 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
233 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
234 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
235 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
236 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
237 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
238 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
239 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
240 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
241 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
247 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
248 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
249 { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
250 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
251 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
252 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
253 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
254 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
255 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
256 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
257 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
258 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
259 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
260 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
261 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
262 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
263 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
269 { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
270 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
271 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
272 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
273 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
274 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
275 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
276 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
277 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
278 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
279 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
280 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
281 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
282 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
283 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
284 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
285 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
291 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
292 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
293 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
294 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
295 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
296 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
297 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
298 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
299 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
300 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
301 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
302 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
303 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
304 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
305 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
306 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
307 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
313 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
314 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
315 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
316 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
317 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
318 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
319 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
320 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
321 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
322 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
323 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
324 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
325 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
326 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
327 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
328 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
329 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
588 if (TVP7002_WRITE == regs->type)