Lines Matching refs:CAPSR
47 #define CAPSR 0x00 /* Capture start register */
176 ceu_write(pcdev, CAPSR, 1 << 16); /* reset */
187 /* wait CAPSR.CPKIL bit */
189 if (!(ceu_read(pcdev, CAPSR) & (1 << 16))) {
334 ceu_write(pcdev, CAPSR, 0x1); /* start capture */
438 ceu_write(pcdev, CAPSR, 1 << 16);
658 u32 capsr = ceu_read(pcdev, CAPSR);
659 ceu_write(pcdev, CAPSR, 1 << 16); /* reset, stop capture */
669 * but if it has been aborted by a CAPSR reset, it shoule exit sooner.
681 while (ceu_read(pcdev, CAPSR) & (1 << 16))
686 ceu_write(pcdev, CAPSR, capsr);
1376 dev_dbg(dev, "CAPSR 0x%x, CFLCR 0x%x\n", capsr, pcdev->cflcr);