Lines Matching refs:dmach
54 /* Ack dmach on CSR and IRQSTATUS_L0 */
55 static u32 omap24xxcam_dmahw_ack_ch(unsigned long base, int dmach)
59 csr = omap24xxcam_reg_in(base, CAMDMA_CSR(dmach));
61 omap24xxcam_reg_out(base, CAMDMA_CSR(dmach), csr);
63 omap24xxcam_reg_out(base, CAMDMA_IRQSTATUS_L0, (1 << dmach));
68 static int omap24xxcam_dmahw_running(unsigned long base, int dmach)
70 return omap24xxcam_reg_in(base, CAMDMA_CCR(dmach)) & CAMDMA_CCR_ENABLE;
73 static void omap24xxcam_dmahw_transfer_setup(unsigned long base, int dmach,
76 omap24xxcam_reg_out(base, CAMDMA_CCR(dmach),
85 omap24xxcam_reg_out(base, CAMDMA_CLNK_CTRL(dmach), 0);
86 omap24xxcam_reg_out(base, CAMDMA_CEN(dmach), len);
87 omap24xxcam_reg_out(base, CAMDMA_CFN(dmach), 1);
88 omap24xxcam_reg_out(base, CAMDMA_CSDP(dmach),
95 omap24xxcam_reg_out(base, CAMDMA_CSSA(dmach), 0);
96 omap24xxcam_reg_out(base, CAMDMA_CDSA(dmach), start);
97 omap24xxcam_reg_out(base, CAMDMA_CSEI(dmach), 0);
98 omap24xxcam_reg_out(base, CAMDMA_CSFI(dmach), DMA_THRESHOLD);
99 omap24xxcam_reg_out(base, CAMDMA_CDEI(dmach), 0);
100 omap24xxcam_reg_out(base, CAMDMA_CDFI(dmach), 0);
101 omap24xxcam_reg_out(base, CAMDMA_CSR(dmach),
107 omap24xxcam_reg_out(base, CAMDMA_CICR(dmach),
115 static void omap24xxcam_dmahw_transfer_start(unsigned long base, int dmach)
117 omap24xxcam_reg_out(base, CAMDMA_CCR(dmach),
127 static void omap24xxcam_dmahw_transfer_chain(unsigned long base, int dmach,
132 if (dmach == 0)
135 prev_dmach = dmach - 1;
137 CAMDMA_CLNK_CTRL_ENABLE_LNK | dmach);
141 ch = (dmach + free_dmach) % NUM_CAMDMA_CHANNELS;
144 if (ch == dmach) {
150 omap24xxcam_dmahw_transfer_start(base, dmach);
163 static void omap24xxcam_dmahw_abort_ch(unsigned long base, int dmach)
166 omap24xxcam_reg_out(base, CAMDMA_CICR(dmach), 0);
168 omap24xxcam_reg_merge(base, CAMDMA_CLNK_CTRL(dmach), 0,
171 omap24xxcam_reg_merge(base, CAMDMA_CCR(dmach), 0, CAMDMA_CCR_ENABLE);
201 int dmach;
210 dmach = dma->next_dmach;
212 dma->ch_state[dmach].callback = callback;
213 dma->ch_state[dmach].arg = arg;
215 omap24xxcam_dmahw_transfer_setup(dma->base, dmach, start, len);
221 omap24xxcam_dmahw_transfer_chain(dma->base, dmach,
227 omap24xxcam_dmahw_transfer_start(dma->base, dmach);
247 int dmach, i, free_dmach;
254 dmach = (dma->next_dmach + dma->free_dmach) % NUM_CAMDMA_CHANNELS;
256 omap24xxcam_dmahw_abort_ch(dma->base, dmach);
257 dmach = (dmach + 1) % NUM_CAMDMA_CHANNELS;
267 dmach = (dma->next_dmach + dma->free_dmach)
269 callback = dma->ch_state[dmach].callback;
270 arg = dma->ch_state[dmach].arg;
300 int dmach;
321 dmach = (dma->next_dmach + dma->free_dmach)
323 if (omap24xxcam_dmahw_running(dma->base, dmach)) {
327 csr = omap24xxcam_dmahw_ack_ch(dma->base, dmach);
336 callback = dma->ch_state[dmach].callback;
337 arg = dma->ch_state[dmach].arg;