Lines Matching defs:reg_write
123 static int reg_write(struct i2c_client *client, const u8 reg,
137 return reg_write(client, reg, ret | data);
148 return reg_write(client, reg, ret & ~data);
162 ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);
164 ret = reg_write(client, MT9V022_READ_MODE, 0x300);
171 ret = reg_write(client, MT9V022_ANALOG_GAIN, 16);
173 ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480);
175 ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, 480);
180 ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0);
197 if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0)
240 ret = reg_write(client, MT9V022_PIXCLK_FV_LV, pixclk);
247 ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);
298 ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH,
301 ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH,
306 ret = reg_write(client, MT9V022_COLUMN_START, rect.left);
308 ret = reg_write(client, MT9V022_ROW_START, rect.top);
314 ret = reg_write(client, MT9V022_HORIZONTAL_BLANKING,
318 ret = reg_write(client, MT9V022_VERTICAL_BLANKING, 45);
320 ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width);
322 ret = reg_write(client, MT9V022_WINDOW_HEIGHT,
498 if (reg_write(client, reg->reg, reg->val) < 0)
670 if (reg_write(client, MT9V022_ANALOG_GAIN, gain) < 0)
693 if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH,
747 ret = reg_write(client, MT9V022_RESET, 1);
762 ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11);
766 ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11);