Lines Matching defs:em28xx_write_reg
209 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
438 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
596 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
597 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
598 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
599 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
600 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
601 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
603 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
604 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
605 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
606 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
607 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
608 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
609 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
641 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
646 rc = em28xx_write_reg(dev, 0x13, 0x0c);
649 rc = em28xx_write_reg(dev, 0x48, 0x00);
652 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
654 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
685 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
692 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
693 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, dev->vbi_width/4);
694 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, dev->vbi_height);
697 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
700 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07);
704 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
858 em28xx_write_reg(dev, 0x48, 0x00);
860 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
862 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);