Lines Matching refs:regw
113 static inline void regw(u32 val, u32 offset)
120 regw(flag, CCDC_PCR);
127 regw(CCDC_ENABLE_VIDEO_PORT, CCDC_FMTCFG);
129 regw(CCDC_DISABLE_VIDEO_PORT, CCDC_FMTCFG);
153 regw((horz_start << CCDC_HORZ_INFO_SPH_SHIFT) | horz_nr_pixels,
165 regw(val, CCDC_VDINT);
178 regw(val, CCDC_VDINT);
181 regw((vert_start << CCDC_VERT_START_SLV0_SHIFT) | vert_start,
183 regw(vert_nr_lines, CCDC_VERT_LINES);
329 regw(0, i);
330 regw(CCDC_NO_CULLING, CCDC_CULLING);
331 regw(CCDC_GAMMA_BITS_11_2, CCDC_ALAW);
400 regw(CCDC_REC656IF_BT656_EN, CCDC_REC656IF);
420 regw(syn_mode, CCDC_SYN_MODE);
430 regw((params->pix_order << CCDC_CCDCFG_Y8POS_SHIFT) |
434 regw((params->pix_order << CCDC_CCDCFG_Y8POS_SHIFT) |
441 regw(((params->win.width * 2 + 31) & ~0x1f), CCDC_HSIZE_OFF);
446 regw(CCDC_SDOFST_FIELD_INTERLEAVED, CCDC_SDOFST);
459 regw(val, CCDC_DCSUB);
461 regw(CCDC_CLAMP_DEFAULT_VAL, CCDC_CLAMP);
476 regw(val, CCDC_CLAMP);
479 regw(CCDC_DCSUB_DEFAULT_VAL, CCDC_DCSUB);
494 regw(val, CCDC_BLKCMP);
503 regw(val, CCDC_FPC);
509 regw(fpc->fpc_table_addr, CCDC_FPC_ADDR);
514 regw(val, CCDC_FPC);
519 regw(val, CCDC_FPC);
541 regw(CCDC_LATCH_ON_VSYNC_DISABLE, CCDC_CCDCFG);
564 regw(val, CCDC_ALAW);
600 regw(val, CCDC_FMTCFG);
604 regw(CCDC_COLPTN_VAL, CCDC_COLPTN);
614 regw(val, CCDC_FMT_HORZ);
626 regw(val, CCDC_FMT_VERT);
630 dev_dbg(ccdc_cfg.dev, "\nbelow regw(val, FMT_VERT)...");
638 regw((params->win.width + CCDC_32BYTE_ALIGN_VAL) &
642 regw(((params->win.width * CCDC_TWO_BYTES_PER_PIXEL) +
650 regw(CCDC_INTERLACED_IMAGE_INVERT, CCDC_SDOFST);
656 regw(CCDC_INTERLACED_NO_IMAGE_INVERT, CCDC_SDOFST);
660 regw(CCDC_PROGRESSIVE_NO_IMAGE_INVERT, CCDC_SDOFST);
680 regw(val, CCDC_VP_OUT);
683 regw(syn_mode, CCDC_SYN_MODE);
830 regw(addr & 0xffffffe0, CCDC_SDR_ADDR);
895 regw(ccdc_ctx[CCDC_SYN_MODE >> 2], CCDC_SYN_MODE);
896 regw(ccdc_ctx[CCDC_HD_VD_WID >> 2], CCDC_HD_VD_WID);
897 regw(ccdc_ctx[CCDC_PIX_LINES >> 2], CCDC_PIX_LINES);
898 regw(ccdc_ctx[CCDC_HORZ_INFO >> 2], CCDC_HORZ_INFO);
899 regw(ccdc_ctx[CCDC_VERT_START >> 2], CCDC_VERT_START);
900 regw(ccdc_ctx[CCDC_VERT_LINES >> 2], CCDC_VERT_LINES);
901 regw(ccdc_ctx[CCDC_CULLING >> 2], CCDC_CULLING);
902 regw(ccdc_ctx[CCDC_HSIZE_OFF >> 2], CCDC_HSIZE_OFF);
903 regw(ccdc_ctx[CCDC_SDOFST >> 2], CCDC_SDOFST);
904 regw(ccdc_ctx[CCDC_SDR_ADDR >> 2], CCDC_SDR_ADDR);
905 regw(ccdc_ctx[CCDC_CLAMP >> 2], CCDC_CLAMP);
906 regw(ccdc_ctx[CCDC_DCSUB >> 2], CCDC_DCSUB);
907 regw(ccdc_ctx[CCDC_COLPTN >> 2], CCDC_COLPTN);
908 regw(ccdc_ctx[CCDC_BLKCMP >> 2], CCDC_BLKCMP);
909 regw(ccdc_ctx[CCDC_FPC >> 2], CCDC_FPC);
910 regw(ccdc_ctx[CCDC_FPC_ADDR >> 2], CCDC_FPC_ADDR);
911 regw(ccdc_ctx[CCDC_VDINT >> 2], CCDC_VDINT);
912 regw(ccdc_ctx[CCDC_ALAW >> 2], CCDC_ALAW);
913 regw(ccdc_ctx[CCDC_REC656IF >> 2], CCDC_REC656IF);
914 regw(ccdc_ctx[CCDC_CCDCFG >> 2], CCDC_CCDCFG);
915 regw(ccdc_ctx[CCDC_FMTCFG >> 2], CCDC_FMTCFG);
916 regw(ccdc_ctx[CCDC_FMT_HORZ >> 2], CCDC_FMT_HORZ);
917 regw(ccdc_ctx[CCDC_FMT_VERT >> 2], CCDC_FMT_VERT);
918 regw(ccdc_ctx[CCDC_FMT_ADDR0 >> 2], CCDC_FMT_ADDR0);
919 regw(ccdc_ctx[CCDC_FMT_ADDR1 >> 2], CCDC_FMT_ADDR1);
920 regw(ccdc_ctx[CCDC_FMT_ADDR2 >> 2], CCDC_FMT_ADDR2);
921 regw(ccdc_ctx[CCDC_FMT_ADDR3 >> 2], CCDC_FMT_ADDR3);
922 regw(ccdc_ctx[CCDC_FMT_ADDR4 >> 2], CCDC_FMT_ADDR4);
923 regw(ccdc_ctx[CCDC_FMT_ADDR5 >> 2], CCDC_FMT_ADDR5);
924 regw(ccdc_ctx[CCDC_FMT_ADDR6 >> 2], CCDC_FMT_ADDR6);
925 regw(ccdc_ctx[CCDC_FMT_ADDR7 >> 2], CCDC_FMT_ADDR7);
926 regw(ccdc_ctx[CCDC_PRGEVEN_0 >> 2], CCDC_PRGEVEN_0);
927 regw(ccdc_ctx[CCDC_PRGEVEN_1 >> 2], CCDC_PRGEVEN_1);
928 regw(ccdc_ctx[CCDC_PRGODD_0 >> 2], CCDC_PRGODD_0);
929 regw(ccdc_ctx[CCDC_PRGODD_1 >> 2], CCDC_PRGODD_1);
930 regw(ccdc_ctx[CCDC_VP_OUT >> 2], CCDC_VP_OUT);
931 regw(ccdc_ctx[CCDC_PCR >> 2], CCDC_PCR);