Lines Matching refs:pulse
226 * FIFO register pulse width count compuations
232 * of the pulse width counter as read from the FIFO. The two lsb's are
245 * The 2 lsb's of the pulse width timer count are not readable, hence
261 * The 2 lsb's of the pulse width timer count are not readable, hence
274 * The total pulse clock count is an 18 bit pulse width timer count as the most
276 * When the Rx clock divider ticks down to 0, it increments the 18 bit pulse
683 p->ir_core_data.pulse = u;
1008 v4l2_info(sd, "\tFIFO data on pulse timer overflow: %s\n",
1044 v4l2_info(sd, "\tMax measurable pulse width: %u us, %llu ns\n",
1050 v4l2_info(sd, "\tMin acceptable pulse width (LPF): %u us, "
1087 v4l2_info(sd, "\tMax pulse width: %u us, %llu ns\n",