Lines Matching defs:fclk
53 u32 fclk;
372 tmp = state->fclk / tmp;
479 do_div(val, (state->fclk / 1000));
505 * divide fclk by 1000000 to get the correct value. */
506 val = -(int) ((freqoffset * (1<<24)) / (state->fclk / 1000000));
533 * divide fclk by 1000000 to get the correct value. */
534 val = (((-val) * (state->fclk/1000000)) / (1<<24));
665 /* set s5h1420 fclk PLL according to desired symbol rate */
667 state->fclk = 80000000;
669 state->fclk = 59000000;
671 state->fclk = 86000000;
673 state->fclk = 88000000;
675 state->fclk = 44000000;
678 switch (state->fclk) {
696 dprintk("pll01: %d, ToneFreq: %d\n", state->fclk/1000000 - 8, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32));
697 s5h1420_writereg(state, PLL01, state->fclk/1000000 - 8);
699 s5h1420_writereg(state, DiS01, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32));
895 state->fclk = 88000000;