Lines Matching refs:mt312_writereg
134 static inline int mt312_writereg(struct mt312_state *state,
147 return mt312_writereg(state, RESET, full ? 0x80 : 0x40);
181 ret = mt312_writereg(state, MON_CTRL, 0x03);
194 ret = mt312_writereg(state, MON_CTRL, 0x05);
245 ret = mt312_writereg(state, CONFIG,
272 ret = mt312_writereg(state, GPP_CTRL, 0x80);
284 ret = mt312_writereg(state, HW_CTRL, 0x00);
288 ret = mt312_writereg(state, MPEG_CTRL, 0x00);
305 ret = mt312_writereg(state, SNR_THS_HIGH, 0x32);
319 ret = mt312_writereg(state, OP_CTRL, buf[0]);
331 ret = mt312_writereg(state, CS_SW_LIM, 0x69);
356 ret = mt312_writereg(state, DISEQC_MODE,
367 ret = mt312_writereg(state, DISEQC_MODE, (diseqc_mode & 0x40));
390 ret = mt312_writereg(state, DISEQC_MODE,
413 ret = mt312_writereg(state, DISEQC_MODE,
434 return mt312_writereg(state, DISEQC_MODE, val);
683 ret = mt312_writereg(state, GPP_CTRL, val);
702 ret = mt312_writereg(state, GPP_CTRL, 0x00);
707 ret = mt312_writereg(state, HW_CTRL, 0x0d);
717 ret = mt312_writereg(state, CONFIG, config & 0x7f);