Lines Matching refs:dib3000mc_write_word
65 static int dib3000mc_write_word(struct dib3000mc_state *state, u16 reg, u16 val)
125 dib3000mc_write_word(state, 23, (u16) (timf >> 16));
126 dib3000mc_write_word(state, 24, (u16) (timf ) & 0xffff);
141 dib3000mc_write_word(state, 51, reg_51);
142 dib3000mc_write_word(state, 52, reg_52);
145 dib3000mc_write_word(state, 245, (1 << 3) | (1 << 0));
147 dib3000mc_write_word(state, 245, 0);
149 dib3000mc_write_word(state, 1040, 0x3);
207 ret |= dib3000mc_write_word(state, 244, outreg);
208 ret |= dib3000mc_write_word(state, 206, smo_reg); /*smo_ mode*/
209 ret |= dib3000mc_write_word(state, 207, fifo_threshold); /* synchronous fread */
210 ret |= dib3000mc_write_word(state, 1040, elecout); /* P_out_cfg */
246 dib3000mc_write_word(state, reg, bw_cfg[reg - 6]);
247 dib3000mc_write_word(state, 12, 0x0000);
248 dib3000mc_write_word(state, 13, 0x03e8);
249 dib3000mc_write_word(state, 14, 0x0000);
250 dib3000mc_write_word(state, 15, 0x03f2);
251 dib3000mc_write_word(state, 16, 0x0001);
252 dib3000mc_write_word(state, 17, 0xb0d0);
254 dib3000mc_write_word(state, 18, 0x0393);
255 dib3000mc_write_word(state, 19, 0x8700);
258 dib3000mc_write_word(state, reg, imp_bw_cfg[reg - 55]);
278 dib3000mc_write_word(state, i, impulse_noise_val[i-58]);
281 dib3000mc_write_word(state, 58, 0x3b);
282 dib3000mc_write_word(state, 84, 0x00);
283 dib3000mc_write_word(state, 85, 0x8200);
286 dib3000mc_write_word(state, 34, 0x1294);
287 dib3000mc_write_word(state, 35, 0x1ff8);
289 dib3000mc_write_word(state, 55, dib3000mc_read_word(state, 55) | (1 << 10));
298 dib3000mc_write_word(state, 1027, 0x8000);
299 dib3000mc_write_word(state, 1027, 0x0000);
302 dib3000mc_write_word(state, 140, 0x0000);
303 dib3000mc_write_word(state, 1031, 0);
306 dib3000mc_write_word(state, 139, 0x0000);
307 dib3000mc_write_word(state, 141, 0x0000);
308 dib3000mc_write_word(state, 175, 0x0002);
309 dib3000mc_write_word(state, 1032, 0x0000);
311 dib3000mc_write_word(state, 139, 0x0001);
312 dib3000mc_write_word(state, 141, 0x0000);
313 dib3000mc_write_word(state, 175, 0x0000);
314 dib3000mc_write_word(state, 1032, 0x012C);
316 dib3000mc_write_word(state, 1033, 0x0000);
319 dib3000mc_write_word(state, 1037, 0x3130);
324 dib3000mc_write_word(state, 33, (5 << 0));
325 dib3000mc_write_word(state, 88, (1 << 10) | (0x10 << 0));
329 dib3000mc_write_word(state, 99, (1 << 9) | (0x20 << 0));
332 dib3000mc_write_word(state, 111, 0x00);
334 dib3000mc_write_word(state, 111, 0x02);
337 dib3000mc_write_word(state, 50, 0x8000);
343 dib3000mc_write_word(state, 53, 0x87);
345 dib3000mc_write_word(state, 54, 0x87);
348 dib3000mc_write_word(state, 36, state->cfg->max_time);
349 dib3000mc_write_word(state, 37, (state->cfg->agc_command1 << 13) | (state->cfg->agc_command2 << 12) | (0x1d << 0));
350 dib3000mc_write_word(state, 38, state->cfg->pwm3_value);
351 dib3000mc_write_word(state, 39, state->cfg->ln_adc_level);
354 dib3000mc_write_word(state, 40, 0x0179);
355 dib3000mc_write_word(state, 41, 0x03f0);
357 dib3000mc_write_word(state, 42, agc->agc1_max);
358 dib3000mc_write_word(state, 43, agc->agc1_min);
359 dib3000mc_write_word(state, 44, agc->agc2_max);
360 dib3000mc_write_word(state, 45, agc->agc2_min);
361 dib3000mc_write_word(state, 46, (agc->agc1_pt1 << 8) | agc->agc1_pt2);
362 dib3000mc_write_word(state, 47, (agc->agc1_slope1 << 8) | agc->agc1_slope2);
363 dib3000mc_write_word(state, 48, (agc->agc2_pt1 << 8) | agc->agc2_pt2);
364 dib3000mc_write_word(state, 49, (agc->agc2_slope1 << 8) | agc->agc2_slope2);
368 dib3000mc_write_word(state, 110, 3277);
370 dib3000mc_write_word(state, 26, 0x6680);
372 dib3000mc_write_word(state, 1, 4);
374 dib3000mc_write_word(state, 2, 4);
376 dib3000mc_write_word(state, 3, 0x1000);
378 dib3000mc_write_word(state, 5, 1);
383 dib3000mc_write_word(state, 4, 0x814);
385 dib3000mc_write_word(state, 21, (1 << 9) | 0x164);
386 dib3000mc_write_word(state, 22, 0x463d);
390 dib3000mc_write_word(state, 120, 0x200f);
392 dib3000mc_write_word(state, 134, 0);
395 dib3000mc_write_word(state, 195, 0x10);
398 dib3000mc_write_word(state, 180, 0x2FF0);
407 dib3000mc_write_word(state, 769, (1 << 7) );
416 dib3000mc_write_word(state, 1031, 0xFFFF);
417 dib3000mc_write_word(state, 1032, 0xFFFF);
418 dib3000mc_write_word(state, 1033, 0xFFF0);
438 dib3000mc_write_word(state, reg, cfg[reg - 129]);
448 // dib3000mc_write_word(state, 100, (11 << 6) + 6);
450 dib3000mc_write_word(state, 100, (16 << 6) + 9);
452 dib3000mc_write_word(state, 1027, 0x0800);
453 dib3000mc_write_word(state, 1027, 0x0000);
456 dib3000mc_write_word(state, 26, 0x6680);
457 dib3000mc_write_word(state, 29, 0x1273);
458 dib3000mc_write_word(state, 33, 5);
460 dib3000mc_write_word(state, 133, 15564);
462 dib3000mc_write_word(state, 12 , 0x0);
463 dib3000mc_write_word(state, 13 , 0x3e8);
464 dib3000mc_write_word(state, 14 , 0x0);
465 dib3000mc_write_word(state, 15 , 0x3f2);
467 dib3000mc_write_word(state, 93,0);
468 dib3000mc_write_word(state, 94,0);
469 dib3000mc_write_word(state, 95,0);
470 dib3000mc_write_word(state, 96,0);
471 dib3000mc_write_word(state, 97,0);
472 dib3000mc_write_word(state, 98,0);
501 dib3000mc_write_word(state, 0, value);
502 dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4));
517 dib3000mc_write_word(state, 181, value);
534 dib3000mc_write_word(state, 180, value);
538 dib3000mc_write_word(state, 0, value | (1 << 9));
539 dib3000mc_write_word(state, 0, value);
568 dib3000mc_write_word(state, 0, reg | (1 << 8));
570 dib3000mc_write_word(state, 0, reg);
599 dib3000mc_write_word(state, 29, 0x1273);
600 dib3000mc_write_word(state, 108, 0x4000); // P_pha3_force_pha_shift
602 dib3000mc_write_word(state, 29, 0x1073);
603 dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift
608 dib3000mc_write_word(state, 26, 38528);
609 dib3000mc_write_word(state, 33, 8);
611 dib3000mc_write_word(state, 26, 30336);
612 dib3000mc_write_word(state, 33, 6);
794 dib3000mc_write_word(state, 212 + index, onoff ? (1 << 13) | pid : 0);
804 return dib3000mc_write_word(state, 206, tmp);
847 dib3000mc_write_word(dmcst, 1024, (new_addr << 3) | 0x1);
855 dib3000mc_write_word(dmcst, 1024, dmcst->i2c_addr << 3);
889 dib3000mc_write_word(st, 1037, 0x3130);