Lines Matching refs:dib0070_write_reg
92 static int dib0070_write_reg(struct dib0070_state *state, u8 reg, u16 val)
125 dib0070_write_reg(state, 0x02, tmp);
131 dib0070_write_reg(state, 0x17, value & 0xfffc);
133 dib0070_write_reg(state, 0x01, tmp | (60 << 9));
135 dib0070_write_reg(state, 0x17, value);
148 dib0070_write_reg(state, 0x0f, 0xed10);
149 dib0070_write_reg(state, 0x17, 0x0034);
151 dib0070_write_reg(state, 0x18, 0x0032);
159 dib0070_write_reg(state, 0x14, state->lo4 | state->captrim);
193 dib0070_write_reg(state, 0x14, state->lo4 | state->fcaptrim);
194 dib0070_write_reg(state, 0x18, 0x07ff);
206 return dib0070_write_reg(state, 0x15, lo5);
214 dib0070_write_reg(state, 0x1b, 0xff00);
215 dib0070_write_reg(state, 0x1a, 0x0000);
217 dib0070_write_reg(state, 0x1b, 0x4112);
219 dib0070_write_reg(state, 0x1a, state->cfg->vga_filter);
222 dib0070_write_reg(state, 0x1a, 0x0009);
354 dib0070_write_reg(state, 0x17, 0x30);
406 dib0070_write_reg(state, 0x11, (u16)FBDiv);
407 dib0070_write_reg(state, 0x12, (Den << 8) | REFDIV);
408 dib0070_write_reg(state, 0x13, (u16) Rest);
414 dib0070_write_reg(state, 0x1d, 0xFFFF);
419 dib0070_write_reg(state, 0x20,
443 dib0070_write_reg(state, 0x0f,
449 dib0070_write_reg(state, 0x0f,
455 dib0070_write_reg(state, 0x06, 0x3fff);
456 dib0070_write_reg(state, 0x07,
458 dib0070_write_reg(state, 0x08, (state->lna_match->lna_band << 10) | (3 << 7) | (127));
459 dib0070_write_reg(state, 0x0d, 0x0d80);
462 dib0070_write_reg(state, 0x18, 0x07ff);
463 dib0070_write_reg(state, 0x17, 0x0033);
526 return dib0070_write_reg(state, 0x07, rxrf2 | (no << 11));
574 dib0070_write_reg(state, 0x18, 0x07ff);
575 dib0070_write_reg(state, 0x20, 0x0800 | 0x4000 | 0x0040 | 0x0020 | 0x0010 | 0x0008 | 0x0002 | 0x0001);
576 dib0070_write_reg(state, 0x0f, (1 << 14) | (2 << 12) | (gain << 9) | (1 << 8) | (1 << 7) | (0 << 0));
579 dib0070_write_reg(state, 0x20, tuner_en);
640 dib0070_write_reg(state, (u8)r, pgm_read_word(n++));
656 dib0070_write_reg(state, 0x10, r);
657 dib0070_write_reg(state, 0x1f, (1 << 8) | ((state->cfg->clock_pad_drive & 0xf) << 5));
661 dib0070_write_reg(state, 0x02, r | (1 << 5));
669 dib0070_write_reg(state, 0x01, (54 << 9) | 0xc8);