Lines Matching refs:pll_freq_cmd
129 u8 pll_freq_cmd[PLL_CMD_LEN];
144 pll_freq_cmd[DEMOD_REDIRECT_REG] = JDVBT90502_2ND_I2C_REG; /* 0xFE */
145 pll_freq_cmd[ADDRESS_BYTE] = state->config.pll_address << 1;
146 pll_freq_cmd[DIVIDER_BYTE1] = (f >> 8) & 0x7F;
147 pll_freq_cmd[DIVIDER_BYTE2] = f & 0xFF;
148 pll_freq_cmd[CONTROL_BYTE] = 0xB2; /* ref.divider:28, 4MHz/28=1/7MHz */
149 pll_freq_cmd[BANDSWITCH_BYTE] = 0x08; /* UHF band */
153 msg[0].buf = pll_freq_cmd;
154 msg[0].len = sizeof(pll_freq_cmd);
162 pll_agc_cmd[DEMOD_REDIRECT_REG] = pll_freq_cmd[DEMOD_REDIRECT_REG];
163 pll_agc_cmd[ADDRESS_BYTE] = pll_freq_cmd[ADDRESS_BYTE];
164 pll_agc_cmd[DIVIDER_BYTE1] = pll_freq_cmd[DIVIDER_BYTE1];
165 pll_agc_cmd[DIVIDER_BYTE2] = pll_freq_cmd[DIVIDER_BYTE2];