Lines Matching refs:FminBin
2323 u32 Fmax, Fmin, FmaxBin, FminBin;
2487 FminBin = 28000000UL ;
2498 Fmin = FminBin ;
2500 FminBin = 42500000UL ;
2502 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2511 Fmin = FminBin ;
2513 FminBin = 56000000UL ;
2515 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2524 Fmin = FminBin ;
2526 FminBin = 85000000UL ;
2528 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2537 Fmin = FminBin ;
2539 FminBin = 112000000UL ;
2541 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2550 Fmin = FminBin ;
2552 FminBin = 170000000UL ;
2554 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2563 Fmin = FminBin ;
2565 FminBin = 225000000UL ;
2567 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2576 Fmin = FminBin ;
2578 FminBin = 300000000UL ;
2580 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2591 FminBin = 340000000UL ;
2593 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2602 Fmin = FminBin ;
2604 FminBin = 450000000UL ;
2606 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2615 Fmin = FminBin ;
2617 FminBin = 680000000UL ;
2619 if (state->RF_LO > FminBin && state->RF_LO <= FmaxBin) {
2628 Fmin = FminBin ;
2675 FminBin = 33000000UL ;
2677 if (state->TG_LO >= FminBin && state->TG_LO <= FmaxBin) {
2682 Fmin = FminBin ;
2684 FminBin = 50000000UL ;
2686 if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
2691 Fmin = FminBin ;
2693 FminBin = 67000000UL ;
2695 if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
2700 Fmin = FminBin ;
2702 FminBin = 100000000UL ;
2704 if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
2709 Fmin = FminBin ;
2711 FminBin = 150000000UL ;
2713 if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
2718 Fmin = FminBin ;
2720 FminBin = 200000000UL ;
2722 if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
2727 Fmin = FminBin ;
2729 FminBin = 300000000UL ;
2731 if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
2736 Fmin = FminBin ;
2738 FminBin = 400000000UL ;
2740 if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
2745 Fmin = FminBin ;
2747 FminBin = 600000000UL ;
2749 if (state->TG_LO > FminBin && state->TG_LO <= FmaxBin) {
2754 Fmin = FminBin ;