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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/isdn/i4l/

Lines Matching refs:hdlc

28 #include <linux/isdn/hdlc.h>
53 void isdnhdlc_rcv_init(struct isdnhdlc_vars *hdlc, u32 features)
55 memset(hdlc, 0, sizeof(struct isdnhdlc_vars));
56 hdlc->state = HDLC_GET_DATA;
58 hdlc->do_adapt56 = 1;
60 hdlc->do_bitreverse = 1;
64 void isdnhdlc_out_init(struct isdnhdlc_vars *hdlc, u32 features)
66 memset(hdlc, 0, sizeof(struct isdnhdlc_vars));
68 hdlc->dchannel = 1;
69 hdlc->state = HDLC_SEND_FIRST_FLAG;
71 hdlc->dchannel = 0;
72 hdlc->state = HDLC_SEND_FAST_FLAG;
73 hdlc->ffvalue = 0x7e;
75 hdlc->cbin = 0x7e;
77 hdlc->do_adapt56 = 1;
78 hdlc->state = HDLC_SENDFLAG_B0;
80 hdlc->data_bits = 8;
82 hdlc->do_bitreverse = 1;
87 check_frame(struct isdnhdlc_vars *hdlc)
91 if (hdlc->dstpos < 2) /* too small - framing error */
93 else if (hdlc->crc != 0xf0b8) /* crc error */
97 hdlc->dstpos -= 2;
99 status = hdlc->dstpos;
131 int isdnhdlc_decode(struct isdnhdlc_vars *hdlc, const u8 *src, int slen,
175 if (hdlc->bit_shift == 0) {
177 if (hdlc->do_bitreverse == 0)
178 hdlc->cbin = bitrev8(*src++);
180 hdlc->cbin = *src++;
182 hdlc->bit_shift = 8;
183 if (hdlc->do_adapt56)
184 hdlc->bit_shift--;
187 switch (hdlc->state) {
191 if (hdlc->cbin == 0xff) {
192 hdlc->bit_shift = 0;
195 hdlc->state = HDLC_GET_FLAG_B0;
196 hdlc->hdlc_bits1 = 0;
197 hdlc->bit_shift = 8;
200 if (!(hdlc->cbin & 0x80)) {
201 hdlc->state = HDLC_GETFLAG_B1A6;
202 hdlc->hdlc_bits1 = 0;
204 if ((!hdlc->do_adapt56) &&
205 (++hdlc->hdlc_bits1 >= 8) &&
206 (hdlc->bit_shift == 1))
207 hdlc->state = HDLC_FAST_IDLE;
209 hdlc->cbin <<= 1;
210 hdlc->bit_shift--;
213 if (hdlc->cbin & 0x80) {
214 hdlc->hdlc_bits1++;
215 if (hdlc->hdlc_bits1 == 6)
216 hdlc->state = HDLC_GETFLAG_B7;
218 hdlc->hdlc_bits1 = 0;
219 hdlc->cbin <<= 1;
220 hdlc->bit_shift--;
223 if (hdlc->cbin & 0x80) {
224 hdlc->state = HDLC_GET_FLAG_B0;
226 hdlc->state = HDLC_GET_DATA;
227 hdlc->crc = 0xffff;
228 hdlc->shift_reg = 0;
229 hdlc->hdlc_bits1 = 0;
230 hdlc->data_bits = 0;
231 hdlc->data_received = 0;
233 hdlc->cbin <<= 1;
234 hdlc->bit_shift--;
237 if (hdlc->cbin & 0x80) {
238 hdlc->hdlc_bits1++;
239 switch (hdlc->hdlc_bits1) {
243 if (hdlc->data_received)
246 if (!hdlc->do_adapt56) {
247 if (hdlc->cbin == fast_abort
248 [hdlc->bit_shift + 1]) {
249 hdlc->state =
251 hdlc->bit_shift = 1;
255 hdlc->state = HDLC_GET_FLAG_B0;
258 hdlc->shift_reg >>= 1;
259 hdlc->shift_reg |= 0x80;
260 hdlc->data_bits++;
264 switch (hdlc->hdlc_bits1) {
268 if (hdlc->data_received)
269 status = check_frame(hdlc);
270 hdlc->crc = 0xffff;
271 hdlc->shift_reg = 0;
272 hdlc->data_bits = 0;
273 if (!hdlc->do_adapt56)
274 handle_fast_flag(hdlc);
276 hdlc->state = HDLC_GET_DATA;
277 hdlc->data_received = 0;
281 hdlc->shift_reg >>= 1;
282 hdlc->data_bits++;
285 hdlc->hdlc_bits1 = 0;
288 hdlc->dstpos = 0;
290 hdlc->cbin <<= 1;
291 hdlc->bit_shift--;
294 if (hdlc->data_bits == 8) {
295 hdlc->data_bits = 0;
296 hdlc->data_received = 1;
297 hdlc->crc = crc_ccitt_byte(hdlc->crc,
298 hdlc->shift_reg);
301 if (hdlc->dstpos < dsize)
302 dst[hdlc->dstpos++] = hdlc->shift_reg;
306 hdlc->dstpos = 0;
309 hdlc->cbin <<= 1;
310 hdlc->bit_shift--;
313 if (hdlc->cbin == hdlc->ffvalue) {
314 hdlc->bit_shift = 0;
317 if (hdlc->cbin == 0xff) {
318 hdlc->state = HDLC_FAST_IDLE;
319 hdlc->bit_shift = 0;
320 } else if (hdlc->ffbit_shift == 8) {
321 hdlc->state = HDLC_GETFLAG_B7;
324 handle_abort(hdlc);
354 int isdnhdlc_encode(struct isdnhdlc_vars *hdlc, const u8 *src, u16 slen,
366 if ((slen == 1) && (hdlc->state == HDLC_SEND_FAST_FLAG))
367 hdlc->state = HDLC_SENDFLAG_ONE;
369 if (hdlc->bit_shift == 0) {
370 if (slen && !hdlc->do_closing) {
371 hdlc->shift_reg = *src++;
375 hdlc->do_closing = 1;
376 hdlc->bit_shift = 8;
378 if (hdlc->state == HDLC_SEND_DATA) {
379 if (hdlc->data_received) {
380 hdlc->state = HDLC_SEND_CRC1;
381 hdlc->crc ^= 0xffff;
382 hdlc->bit_shift = 8;
383 hdlc->shift_reg =
384 hdlc->crc & 0xff;
385 } else if (!hdlc->do_adapt56)
386 hdlc->state =
389 hdlc->state =
396 switch (hdlc->state) {
402 hdlc->do_closing = 0;
405 if (hdlc->do_bitreverse == 0)
406 *dst++ = bitrev8(hdlc->ffvalue);
408 *dst++ = hdlc->ffvalue;
415 if (hdlc->bit_shift == 8) {
416 hdlc->cbin = hdlc->ffvalue >>
417 (8 - hdlc->data_bits);
418 hdlc->state = HDLC_SEND_DATA;
419 hdlc->crc = 0xffff;
420 hdlc->hdlc_bits1 = 0;
421 hdlc->data_received = 1;
425 hdlc->do_closing = 0;
426 hdlc->cbin <<= 1;
427 hdlc->data_bits++;
428 hdlc->hdlc_bits1 = 0;
429 hdlc->state = HDLC_SENDFLAG_B1A6;
432 hdlc->cbin <<= 1;
433 hdlc->data_bits++;
434 hdlc->cbin++;
435 if (++hdlc->hdlc_bits1 == 6)
436 hdlc->state = HDLC_SENDFLAG_B7;
439 hdlc->cbin <<= 1;
440 hdlc->data_bits++;
442 hdlc->state = HDLC_SENDFLAG_B0;
445 if (hdlc->bit_shift == 8) {
446 hdlc->state = HDLC_SEND_DATA;
447 hdlc->crc = 0xffff;
448 hdlc->hdlc_bits1 = 0;
449 hdlc->data_received = 1;
453 hdlc->data_received = 1;
454 if (hdlc->data_bits == 8) {
455 hdlc->state = HDLC_SEND_DATA;
456 hdlc->crc = 0xffff;
457 hdlc->hdlc_bits1 = 0;
460 hdlc->cbin <<= 1;
461 hdlc->data_bits++;
462 if (hdlc->shift_reg & 0x01)
463 hdlc->cbin++;
464 hdlc->shift_reg >>= 1;
465 hdlc->bit_shift--;
466 if (hdlc->bit_shift == 0) {
467 hdlc->state = HDLC_SEND_DATA;
468 hdlc->crc = 0xffff;
469 hdlc->hdlc_bits1 = 0;
473 hdlc->cbin <<= 1;
474 hdlc->data_bits++;
475 if (hdlc->hdlc_bits1 == 5) {
476 hdlc->hdlc_bits1 = 0;
479 if (hdlc->bit_shift == 8)
480 hdlc->crc = crc_ccitt_byte(hdlc->crc,
481 hdlc->shift_reg);
482 if (hdlc->shift_reg & 0x01) {
483 hdlc->hdlc_bits1++;
484 hdlc->cbin++;
485 hdlc->shift_reg >>= 1;
486 hdlc->bit_shift--;
488 hdlc->hdlc_bits1 = 0;
489 hdlc->shift_reg >>= 1;
490 hdlc->bit_shift--;
494 hdlc->cbin <<= 1;
495 hdlc->data_bits++;
496 if (hdlc->hdlc_bits1 == 5) {
497 hdlc->hdlc_bits1 = 0;
500 if (hdlc->shift_reg & 0x01) {
501 hdlc->hdlc_bits1++;
502 hdlc->cbin++;
503 hdlc->shift_reg >>= 1;
504 hdlc->bit_shift--;
506 hdlc->hdlc_bits1 = 0;
507 hdlc->shift_reg >>= 1;
508 hdlc->bit_shift--;
510 if (hdlc->bit_shift == 0) {
511 hdlc->shift_reg = (hdlc->crc >> 8);
512 hdlc->state = HDLC_SEND_CRC2;
513 hdlc->bit_shift = 8;
517 hdlc->cbin <<= 1;
518 hdlc->data_bits++;
519 if (hdlc->hdlc_bits1 == 5) {
520 hdlc->hdlc_bits1 = 0;
523 if (hdlc->shift_reg & 0x01) {
524 hdlc->hdlc_bits1++;
525 hdlc->cbin++;
526 hdlc->shift_reg >>= 1;
527 hdlc->bit_shift--;
529 hdlc->hdlc_bits1 = 0;
530 hdlc->shift_reg >>= 1;
531 hdlc->bit_shift--;
533 if (hdlc->bit_shift == 0) {
534 hdlc->shift_reg = 0x7e;
535 hdlc->state = HDLC_SEND_CLOSING_FLAG;
536 hdlc->bit_shift = 8;
540 hdlc->cbin <<= 1;
541 hdlc->data_bits++;
542 if (hdlc->hdlc_bits1 == 5) {
543 hdlc->hdlc_bits1 = 0;
546 if (hdlc->shift_reg & 0x01)
547 hdlc->cbin++;
548 hdlc->shift_reg >>= 1;
549 hdlc->bit_shift--;
550 if (hdlc->bit_shift == 0) {
551 hdlc->ffvalue =
552 xfast_flag_value[hdlc->data_bits];
553 if (hdlc->dchannel) {
554 hdlc->ffvalue = 0x7e;
555 hdlc->state = HDLC_SEND_IDLE1;
556 hdlc->bit_shift = 8-hdlc->data_bits;
557 if (hdlc->bit_shift == 0)
558 hdlc->state =
561 if (!hdlc->do_adapt56) {
562 hdlc->state =
564 hdlc->data_received = 0;
566 hdlc->state = HDLC_SENDFLAG_B0;
567 hdlc->data_received = 0;
576 hdlc->do_closing = 0;
577 hdlc->cbin <<= 1;
578 hdlc->cbin++;
579 hdlc->data_bits++;
580 hdlc->bit_shift--;
581 if (hdlc->bit_shift == 0) {
582 hdlc->state = HDLC_SEND_FAST_IDLE;
583 hdlc->bit_shift = 0;
587 hdlc->do_closing = 0;
588 hdlc->cbin = 0xff;
589 hdlc->data_bits = 8;
590 if (hdlc->bit_shift == 8) {
591 hdlc->cbin = 0x7e;
592 hdlc->state = HDLC_SEND_FIRST_FLAG;
595 if (hdlc->do_bitreverse == 0)
596 *dst++ = bitrev8(hdlc->cbin);
598 *dst++ = hdlc->cbin;
599 hdlc->bit_shift = 0;
600 hdlc->data_bits = 0;
608 if (hdlc->do_adapt56) {
609 if (hdlc->data_bits == 7) {
610 hdlc->cbin <<= 1;
611 hdlc->cbin++;
612 hdlc->data_bits++;
615 if (hdlc->data_bits == 8) {
617 if (hdlc->do_bitreverse == 0)
618 *dst++ = bitrev8(hdlc->cbin);
620 *dst++ = hdlc->cbin;
621 hdlc->data_bits = 0;