Lines Matching refs:wm
88 int wm97xx_reg_read(struct wm97xx *wm, u16 reg)
90 if (wm->ac97)
91 return wm->ac97->bus->ops->read(wm->ac97, reg);
97 void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val)
101 wm->dig[(reg - AC97_WM9713_DIG1) >> 1] = val;
105 wm->gpio[(reg - AC97_GPIO_CFG) >> 1] = val;
109 wm->misc = val;
111 if (wm->ac97)
112 wm->ac97->bus->ops->write(wm->ac97, reg, val);
118 * @wm: wm97xx device.
124 int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel)
130 mutex_lock(&wm->codec_mutex);
135 if (wm->id == WM9713_ID2 &&
136 (power = wm97xx_reg_read(wm, AC97_EXTENDED_MID)) & 0x8000) {
138 wm97xx_reg_write(wm, AC97_EXTENDED_MID, power & 0x7fff);
142 wm->codec->aux_prepare(wm);
145 wm->pen_probably_down = 1;
146 wm->codec->poll_sample(wm, adcsel, &auxval);
149 wm97xx_reg_write(wm, AC97_EXTENDED_MID, power | 0x8000);
151 wm->codec->dig_restore(wm);
153 wm->pen_probably_down = 0;
155 mutex_unlock(&wm->codec_mutex);
162 * @wm: wm97xx device.
168 enum wm97xx_gpio_status wm97xx_get_gpio(struct wm97xx *wm, u32 gpio)
173 mutex_lock(&wm->codec_mutex);
174 status = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
181 mutex_unlock(&wm->codec_mutex);
188 * @wm: wm97xx device.
195 void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio,
200 mutex_lock(&wm->codec_mutex);
201 reg = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
208 if (wm->id == WM9712_ID2 && wm->variant != WM97xx_WM1613)
209 wm97xx_reg_write(wm, AC97_GPIO_STATUS, reg << 1);
211 wm97xx_reg_write(wm, AC97_GPIO_STATUS, reg);
212 mutex_unlock(&wm->codec_mutex);
220 void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio, enum wm97xx_gpio_dir dir,
226 mutex_lock(&wm->codec_mutex);
227 reg = wm97xx_reg_read(wm, AC97_GPIO_POLARITY);
234 wm97xx_reg_write(wm, AC97_GPIO_POLARITY, reg);
235 reg = wm97xx_reg_read(wm, AC97_GPIO_STICKY);
242 wm97xx_reg_write(wm, AC97_GPIO_STICKY, reg);
243 reg = wm97xx_reg_read(wm, AC97_GPIO_WAKEUP);
250 wm97xx_reg_write(wm, AC97_GPIO_WAKEUP, reg);
251 reg = wm97xx_reg_read(wm, AC97_GPIO_CFG);
258 wm97xx_reg_write(wm, AC97_GPIO_CFG, reg);
259 mutex_unlock(&wm->codec_mutex);
270 * @wm: WM97xx device to configure
273 void wm97xx_set_suspend_mode(struct wm97xx *wm, u16 mode)
275 wm->suspend_mode = mode;
276 device_init_wakeup(&wm->input_dev->dev, mode != 0);
285 struct wm97xx *wm = container_of(work, struct wm97xx, pen_event_work);
286 int pen_was_down = wm->pen_is_down;
289 if (wm->id == WM9705_ID2) {
290 if (wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD) &
292 wm->pen_is_down = 1;
294 wm->pen_is_down = 0;
297 mutex_lock(&wm->codec_mutex);
298 status = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
299 pol = wm97xx_reg_read(wm, AC97_GPIO_POLARITY);
302 wm->pen_is_down = 1;
303 wm97xx_reg_write(wm, AC97_GPIO_POLARITY, pol &
306 wm->pen_is_down = 0;
307 wm97xx_reg_write(wm, AC97_GPIO_POLARITY, pol |
311 if (wm->id == WM9712_ID2 && wm->variant != WM97xx_WM1613)
312 wm97xx_reg_write(wm, AC97_GPIO_STATUS, (status &
315 wm97xx_reg_write(wm, AC97_GPIO_STATUS, status &
317 mutex_unlock(&wm->codec_mutex);
325 if (!wm->mach_ops->acc_enabled || wm->mach_ops->acc_pen_down) {
326 if (wm->pen_is_down && !pen_was_down) {
328 queue_delayed_work(wm->ts_workq, &wm->ts_reader, 1);
332 if (!wm->pen_is_down && pen_was_down)
333 wm->pen_is_down = 1;
336 if (!wm->pen_is_down && wm->mach_ops->acc_enabled)
337 wm->mach_ops->acc_pen_up(wm);
339 wm->mach_ops->irq_enable(wm, 1);
353 struct wm97xx *wm = dev_id;
355 if (!work_pending(&wm->pen_event_work)) {
356 wm->mach_ops->irq_enable(wm, 0);
357 queue_work(wm->ts_workq, &wm->pen_event_work);
366 static int wm97xx_init_pen_irq(struct wm97xx *wm)
372 BUG_ON(!wm->mach_ops->irq_enable);
374 if (request_irq(wm->pen_irq, wm97xx_pen_interrupt, IRQF_SHARED,
375 "wm97xx-pen", wm)) {
376 dev_err(wm->dev,
378 wm->pen_irq = 0;
383 if (wm->id != WM9705_ID2) {
384 BUG_ON(!wm->mach_ops->irq_gpio);
385 reg = wm97xx_reg_read(wm, AC97_MISC_AFE);
386 wm97xx_reg_write(wm, AC97_MISC_AFE,
387 reg & ~(wm->mach_ops->irq_gpio));
388 reg = wm97xx_reg_read(wm, 0x5a);
389 wm97xx_reg_write(wm, 0x5a, reg & ~0x0001);
395 static int wm97xx_read_samples(struct wm97xx *wm)
400 mutex_lock(&wm->codec_mutex);
402 if (wm->mach_ops && wm->mach_ops->acc_enabled)
403 rc = wm->mach_ops->acc_pen_down(wm);
405 rc = wm->codec->poll_touch(wm, &data);
408 if (wm->pen_is_down) {
409 wm->pen_is_down = 0;
410 dev_dbg(wm->dev, "pen up\n");
411 input_report_abs(wm->input_dev, ABS_PRESSURE, 0);
412 input_report_key(wm->input_dev, BTN_TOUCH, 0);
413 input_sync(wm->input_dev);
425 if (wm->ts_reader_interval < HZ / 10)
426 wm->ts_reader_interval++;
430 dev_dbg(wm->dev,
434 input_report_abs(wm->input_dev, ABS_X, data.x & 0xfff);
435 input_report_abs(wm->input_dev, ABS_Y, data.y & 0xfff);
436 input_report_abs(wm->input_dev, ABS_PRESSURE, data.p & 0xfff);
437 input_report_key(wm->input_dev, BTN_TOUCH, 1);
438 input_sync(wm->input_dev);
439 wm->pen_is_down = 1;
440 wm->ts_reader_interval = wm->ts_reader_min_interval;
442 dev_dbg(wm->dev, "pen down\n");
443 wm->pen_is_down = 1;
444 wm->ts_reader_interval = wm->ts_reader_min_interval;
447 mutex_unlock(&wm->codec_mutex);
457 struct wm97xx *wm = container_of(work, struct wm97xx, ts_reader.work);
459 BUG_ON(!wm->codec);
462 rc = wm97xx_read_samples(wm);
465 if (wm->pen_is_down || !wm->pen_irq)
466 queue_delayed_work(wm->ts_workq, &wm->ts_reader,
467 wm->ts_reader_interval);
479 struct wm97xx *wm = input_get_drvdata(idev);
481 wm->ts_workq = create_singlethread_workqueue("kwm97xx");
482 if (wm->ts_workq == NULL) {
483 dev_err(wm->dev,
489 if (wm->mach_ops && wm->mach_ops->acc_enabled)
490 wm->codec->acc_enable(wm, 1);
491 wm->codec->dig_enable(wm, 1);
493 INIT_DELAYED_WORK(&wm->ts_reader, wm97xx_ts_reader);
494 INIT_WORK(&wm->pen_event_work, wm97xx_pen_irq_worker);
496 wm->ts_reader_min_interval = HZ >= 100 ? HZ / 100 : 1;
497 if (wm->ts_reader_min_interval < 1)
498 wm->ts_reader_min_interval = 1;
499 wm->ts_reader_interval = wm->ts_reader_min_interval;
501 wm->pen_is_down = 0;
502 if (wm->pen_irq)
503 wm97xx_init_pen_irq(wm);
505 dev_err(wm->dev, "No IRQ specified\n");
510 if (wm->pen_irq == 0)
511 queue_delayed_work(wm->ts_workq, &wm->ts_reader,
512 wm->ts_reader_interval);
528 struct wm97xx *wm = input_get_drvdata(idev);
531 if (wm->pen_irq) {
533 if (wm->id != WM9705_ID2) {
534 BUG_ON(!wm->mach_ops->irq_gpio);
535 reg = wm97xx_reg_read(wm, AC97_MISC_AFE);
536 wm97xx_reg_write(wm, AC97_MISC_AFE,
537 reg | wm->mach_ops->irq_gpio);
540 free_irq(wm->pen_irq, wm);
543 wm->pen_is_down = 0;
546 if (cancel_work_sync(&wm->pen_event_work))
547 wm->mach_ops->irq_enable(wm, 1);
552 cancel_delayed_work_sync(&wm->ts_reader);
554 destroy_workqueue(wm->ts_workq);
557 wm->codec->dig_enable(wm, 0);
558 if (wm->mach_ops && wm->mach_ops->acc_enabled)
559 wm->codec->acc_enable(wm, 0);
564 struct wm97xx *wm;
568 wm = kzalloc(sizeof(struct wm97xx), GFP_KERNEL);
569 if (!wm)
571 mutex_init(&wm->codec_mutex);
573 wm->dev = dev;
574 dev_set_drvdata(dev, wm);
575 wm->ac97 = to_ac97_t(dev);
578 id = wm97xx_reg_read(wm, AC97_VENDOR_ID1);
585 wm->id = wm97xx_reg_read(wm, AC97_VENDOR_ID2);
587 wm->variant = WM97xx_GENERIC;
589 dev_info(wm->dev, "detected a wm97%02x codec\n", wm->id & 0xff);
591 switch (wm->id & 0xff) {
594 wm->codec = &wm9705_codec;
599 wm->codec = &wm9712_codec;
604 wm->codec = &wm9713_codec;
608 dev_err(wm->dev, "Support for wm97%02x not compiled in.\n",
609 wm->id & 0xff);
615 wm->codec->phy_init(wm);
618 wm->gpio[0] = wm97xx_reg_read(wm, AC97_GPIO_CFG);
619 wm->gpio[1] = wm97xx_reg_read(wm, AC97_GPIO_POLARITY);
620 wm->gpio[2] = wm97xx_reg_read(wm, AC97_GPIO_STICKY);
621 wm->gpio[3] = wm97xx_reg_read(wm, AC97_GPIO_WAKEUP);
622 wm->gpio[4] = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
623 wm->gpio[5] = wm97xx_reg_read(wm, AC97_MISC_AFE);
625 wm->input_dev = input_allocate_device();
626 if (wm->input_dev == NULL) {
632 wm->input_dev->name = "wm97xx touchscreen";
633 wm->input_dev->phys = "wm97xx";
634 wm->input_dev->open = wm97xx_ts_input_open;
635 wm->input_dev->close = wm97xx_ts_input_close;
637 __set_bit(EV_ABS, wm->input_dev->evbit);
638 __set_bit(EV_KEY, wm->input_dev->evbit);
639 __set_bit(BTN_TOUCH, wm->input_dev->keybit);
641 input_set_abs_params(wm->input_dev, ABS_X, abs_x[0], abs_x[1],
643 input_set_abs_params(wm->input_dev, ABS_Y, abs_y[0], abs_y[1],
645 input_set_abs_params(wm->input_dev, ABS_PRESSURE, abs_p[0], abs_p[1],
648 input_set_drvdata(wm->input_dev, wm);
649 wm->input_dev->dev.parent = dev;
651 ret = input_register_device(wm->input_dev);
656 wm->battery_dev = platform_device_alloc("wm97xx-battery", -1);
657 if (!wm->battery_dev) {
661 platform_set_drvdata(wm->battery_dev, wm);
662 wm->battery_dev->dev.parent = dev;
663 wm->battery_dev->dev.platform_data = pdata;
664 ret = platform_device_add(wm->battery_dev);
670 wm->touch_dev = platform_device_alloc("wm97xx-touch", -1);
671 if (!wm->touch_dev) {
675 platform_set_drvdata(wm->touch_dev, wm);
676 wm->touch_dev->dev.parent = dev;
677 wm->touch_dev->dev.platform_data = pdata;
678 ret = platform_device_add(wm->touch_dev);
685 platform_device_put(wm->touch_dev);
687 platform_device_unregister(wm->battery_dev);
688 wm->battery_dev = NULL;
690 platform_device_put(wm->battery_dev);
692 input_unregister_device(wm->input_dev);
693 wm->input_dev = NULL;
695 input_free_device(wm->input_dev);
697 kfree(wm);
704 struct wm97xx *wm = dev_get_drvdata(dev);
706 platform_device_unregister(wm->battery_dev);
707 platform_device_unregister(wm->touch_dev);
708 input_unregister_device(wm->input_dev);
709 kfree(wm);
717 struct wm97xx *wm = dev_get_drvdata(dev);
721 if (device_may_wakeup(&wm->input_dev->dev))
722 suspend_mode = wm->suspend_mode;
726 if (wm->input_dev->users)
727 cancel_delayed_work_sync(&wm->ts_reader);
730 reg = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER2);
732 if (wm->input_dev->users)
734 wm->ac97->bus->ops->write(wm->ac97, AC97_WM97XX_DIGITISER2, reg);
738 if (wm->id == WM9713_ID2 &&
739 (!wm->input_dev->users || !suspend_mode)) {
740 reg = wm97xx_reg_read(wm, AC97_EXTENDED_MID) | 0x8000;
741 wm97xx_reg_write(wm, AC97_EXTENDED_MID, reg);
749 struct wm97xx *wm = dev_get_drvdata(dev);
752 if (wm->id == WM9713_ID2) {
753 wm97xx_reg_write(wm, AC97_WM9713_DIG1, wm->dig[0]);
754 wm97xx_reg_write(wm, 0x5a, wm->misc);
755 if (wm->input_dev->users) {
757 reg = wm97xx_reg_read(wm, AC97_EXTENDED_MID) & 0x7fff;
758 wm97xx_reg_write(wm, AC97_EXTENDED_MID, reg);
762 wm97xx_reg_write(wm, AC97_WM9713_DIG2, wm->dig[1]);
763 wm97xx_reg_write(wm, AC97_WM9713_DIG3, wm->dig[2]);
765 wm97xx_reg_write(wm, AC97_GPIO_CFG, wm->gpio[0]);
766 wm97xx_reg_write(wm, AC97_GPIO_POLARITY, wm->gpio[1]);
767 wm97xx_reg_write(wm, AC97_GPIO_STICKY, wm->gpio[2]);
768 wm97xx_reg_write(wm, AC97_GPIO_WAKEUP, wm->gpio[3]);
769 wm97xx_reg_write(wm, AC97_GPIO_STATUS, wm->gpio[4]);
770 wm97xx_reg_write(wm, AC97_MISC_AFE, wm->gpio[5]);
772 if (wm->input_dev->users && !wm->pen_irq) {
773 wm->ts_reader_interval = wm->ts_reader_min_interval;
774 queue_delayed_work(wm->ts_workq, &wm->ts_reader,
775 wm->ts_reader_interval);
789 int wm97xx_register_mach_ops(struct wm97xx *wm,
792 mutex_lock(&wm->codec_mutex);
793 if (wm->mach_ops) {
794 mutex_unlock(&wm->codec_mutex);
797 wm->mach_ops = mach_ops;
798 mutex_unlock(&wm->codec_mutex);
804 void wm97xx_unregister_mach_ops(struct wm97xx *wm)
806 mutex_lock(&wm->codec_mutex);
807 wm->mach_ops = NULL;
808 mutex_unlock(&wm->codec_mutex);