Lines Matching refs:wm
138 static void wm9705_phy_init(struct wm97xx *wm)
146 wm97xx_reg_write(wm, AC97_AUX, 0x8000);
147 wm97xx_reg_write(wm, AC97_VIDEO, 0x8000);
152 dev_dbg(wm->dev,
155 dev_dbg(wm->dev,
163 dev_dbg(wm->dev, "supplied delay out of range.");
169 dev_dbg(wm->dev, "setting adc sample delay to %d u Secs.",
174 dev_dbg(wm->dev, "setting pdd to Vmid/%d", 1 - (pdd & 0x000f));
179 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, dig1);
180 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2);
183 static void wm9705_dig_enable(struct wm97xx *wm, int enable)
186 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2,
187 wm->dig[2] | WM97XX_PRP_DET_DIG);
188 wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD); /* dummy read */
190 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2,
191 wm->dig[2] & ~WM97XX_PRP_DET_DIG);
194 static void wm9705_aux_prepare(struct wm97xx *wm)
196 memcpy(wm->dig_save, wm->dig, sizeof(wm->dig));
197 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, 0);
198 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, WM97XX_PRP_DET_DIG);
201 static void wm9705_dig_restore(struct wm97xx *wm)
203 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, wm->dig_save[1]);
204 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, wm->dig_save[2]);
207 static inline int is_pden(struct wm97xx *wm)
209 return wm->dig[2] & WM9705_PDEN;
215 static int wm9705_poll_sample(struct wm97xx *wm, int adcsel, int *sample)
219 if (!wm->pen_probably_down) {
220 u16 data = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
223 wm->pen_probably_down = 1;
230 if (wm->mach_ops && wm->mach_ops->pre_sample)
231 wm->mach_ops->pre_sample(adcsel);
232 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1,
239 while ((wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER1) & WM97XX_POLL)
247 if (is_pden(wm))
248 wm->pen_probably_down = 0;
250 dev_dbg(wm->dev, "adc sample timeout");
254 *sample = wm97xx_reg_read(wm, AC97_WM97XX_DIGITISER_RD);
255 if (wm->mach_ops && wm->mach_ops->post_sample)
256 wm->mach_ops->post_sample(adcsel);
260 dev_dbg(wm->dev, "adc wrong sample, read %x got %x", adcsel,
266 wm->pen_probably_down = 0;
276 static int wm9705_poll_touch(struct wm97xx *wm, struct wm97xx_data *data)
280 rc = wm9705_poll_sample(wm, WM97XX_ADCSEL_X, &data->x);
283 rc = wm9705_poll_sample(wm, WM97XX_ADCSEL_Y, &data->y);
287 rc = wm9705_poll_sample(wm, WM97XX_ADCSEL_PRES, &data->p);
300 static int wm9705_acc_enable(struct wm97xx *wm, int enable)
305 dig1 = wm->dig[1];
306 dig2 = wm->dig[2];
310 if (wm->mach_ops->acc_startup &&
311 (ret = wm->mach_ops->acc_startup(wm)) < 0)
317 WM97XX_SLT(wm->acc_slot) |
318 WM97XX_RATE(wm->acc_rate);
325 if (wm->mach_ops->acc_shutdown)
326 wm->mach_ops->acc_shutdown(wm);
329 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, dig1);
330 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER2, dig2);