Lines Matching refs:s_state
303 switch (qp->s_state) {
351 qp->s_state = OP(SEND_FIRST);
356 qp->s_state = OP(SEND_ONLY);
358 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
390 qp->s_state = OP(RDMA_WRITE_FIRST);
395 qp->s_state = OP(RDMA_WRITE_ONLY);
397 qp->s_state =
437 qp->s_state = OP(RDMA_READ_REQUEST);
464 qp->s_state = OP(COMPARE_SWAP);
470 qp->s_state = OP(FETCH_ADD);
513 * qp->s_state is normally set to the opcode of the
524 qp->s_state = OP(SEND_MIDDLE);
537 qp->s_state = OP(SEND_LAST);
539 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
554 * qp->s_state is normally set to the opcode of the
565 qp->s_state = OP(RDMA_WRITE_MIDDLE);
578 qp->s_state = OP(RDMA_WRITE_LAST);
580 qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
595 * qp->s_state is normally set to the opcode of the
609 qp->s_state = OP(RDMA_READ_REQUEST);
633 qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), bth2);
801 qp->s_state = OP(SEND_LAST);
824 qp->s_state = OP(SEND_LAST);
838 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
843 qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
847 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
855 qp->s_state = OP(SEND_LAST);
1107 qp->s_state = OP(SEND_LAST);
1250 qp->s_state = OP(SEND_LAST);