Lines Matching refs:qib_write_kreg
650 static inline void qib_write_kreg(const struct qib_devdata *dd,
745 static inline void qib_write_kreg(const struct qib_devdata *dd,
783 qib_write_kreg(dd, regno + ctxt, value);
1256 qib_write_kreg(dd, kr_sendbuffererror + i, sbuf[i]);
1394 qib_write_kreg(dd, kr_scratch, 0);
1406 qib_write_kreg(dd, kr_scratch, 0);
1411 qib_write_kreg(dd, kr_scratch, 0);
1572 qib_write_kreg(dd, kr_errclear, errs);
1873 qib_write_kreg(dd, kr_intmask, dd->cspec->int_enable_mask);
1875 qib_write_kreg(dd, kr_intclear, 0ULL);
1880 qib_write_kreg(dd, kr_intgranted, val);
1883 qib_write_kreg(dd, kr_intmask, 0ULL);
1906 qib_write_kreg(dd, kr_errmask, 0ULL);
1917 qib_write_kreg(dd, kr_control, dd->control);
1926 qib_write_kreg(dd, kr_hwerrclear, 0ULL);
1927 qib_write_kreg(dd, kr_errclear, E_SPKT_ERRS_IGNORE);
1928 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);
1969 qib_write_kreg(dd, kr_hwerrclear, hwerrs &
2006 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);
2051 qib_write_kreg(dd, kr_hwerrclear, ~HWE_MASK(PowerOnBISTFailed));
2052 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);
2055 qib_write_kreg(dd, kr_errclear, ~0ULL);
2057 qib_write_kreg(dd, kr_errmask, ~0ULL);
2074 qib_write_kreg(dd, kr_errclear, QIB_E_SPIOARMLAUNCH);
2078 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);
2128 qib_write_kreg(dd, kr_scratch, 0);
2174 qib_write_kreg(dd, kr_scratch, 0ULL);
2187 qib_write_kreg(dd, kr_scratch, 0ULL);
2215 qib_write_kreg(dd, kr_scratch, 0ULL);
2254 qib_write_kreg(dd, kr_scratch, 0ULL);
2314 qib_write_kreg(dd, kr_scratch, 0);
2381 qib_write_kreg(dd, kr_hwdiagctrl,
2409 qib_write_kreg(dd, kr_hwdiagctrl, diagc);
2479 qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);
2510 qib_write_kreg(dd, kr_intgranted, intgranted);
2542 qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);
2584 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl);
2585 qib_write_kreg(dd, kr_scratch, 0ULL);
2602 qib_write_kreg(dd, kr_intmask, (dd->cspec->int_enable_mask & ~kills));
2627 qib_write_kreg(dd, kr_gpio_clear, gpiostatus);
2664 qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);
2707 qib_write_kreg(dd, kr_rcvavailtimeout + rcd->ctxt, timeout);
2772 qib_write_kreg(dd, kr_intclear, istat);
2834 qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) |
2864 qib_write_kreg(dd, kr_intclear, QIB_I_SPIOBUFAVAIL);
2897 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
2926 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
2955 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
2985 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
3022 qib_write_kreg(dd, kr_intclear, ~0ULL);
3025 qib_write_kreg(dd, kr_intgranted, ~0ULL);
3026 qib_write_kreg(dd, kr_vecclr_wo_int, ~0ULL);
3112 qib_write_kreg(dd, kr_intredirect + i, redirect[i]);
3296 qib_write_kreg(dd, 2 * i +
3299 qib_write_kreg(dd, 1 + 2 * i +
3528 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl);
3727 qib_write_kreg(dd, kr_scratch, 0ULL);
3741 qib_write_kreg(dd, kr_scratch, 0ULL);
3761 qib_write_kreg(dd, kr_scratch, 0ULL);
3778 qib_write_kreg(dd, kr_scratch, 0ULL);
3890 qib_write_kreg(dd, kr_scratch, 0);
3924 qib_write_kreg(ppd->dd, kr_scratch, 0);
3965 qib_write_kreg(dd, kr_scratch, 0);
4108 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl);
4224 qib_write_kreg(dd, kr_sendctrl,
4227 qib_write_kreg(dd, kr_scratch, 0);
4243 qib_write_kreg(dd, kr_scratch, 0);
4257 qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl);
4258 qib_write_kreg(dd, kr_scratch, 0);
4263 qib_write_kreg(dd, kr_scratch, 0);
4267 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl);
4268 qib_write_kreg(dd, kr_scratch, 0);
4282 qib_write_kreg(dd, kr_scratch, v);
4284 qib_write_kreg(dd, kr_scratch, v);
4766 qib_write_kreg(dd, kr_hwerrmask,
4776 qib_write_kreg(dd, kr_scratch, 0ULL);
4777 qib_write_kreg(dd, kr_hwerrclear,
4779 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);
4909 qib_write_kreg(ppd->dd, kr_scratch, 0);
5280 qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);
5281 qib_write_kreg(dd, kr_gpio_out, new_out);
5480 qib_write_kreg(dd, idx, tval);
5481 qib_write_kreg(dd, kr_scratch, 0Ull);
5558 qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);
5559 qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);
5688 qib_write_kreg(dd, kr_rcvhdrentsize, dd->rcvhdrentsize);
5689 qib_write_kreg(dd, kr_rcvhdrsize, dd->rcvhdrsize);
5690 qib_write_kreg(dd, kr_rcvhdrcnt, dd->rcvhdrcnt);
5691 qib_write_kreg(dd, kr_sendpioavailaddr, dd->pioavailregs_phys);
5711 qib_write_kreg(dd, kr_control, dd->control);
5729 qib_write_kreg(dd, kr_control, dd->control);
5758 qib_write_kreg(ppd->dd, kr_scratch, 0);
5807 qib_write_kreg(dd, KREG_IDX(RcvQPMulticastContext_1), 1);
5858 qib_write_kreg(dd, kr_rcvavailtimeout + i, rcv_int_timeout);
6577 qib_write_kreg(dd, kr_sendcheckmask + i,
6581 qib_write_kreg(dd, kr_sendgrhcheckmask + i,
6583 qib_write_kreg(dd, kr_sendibpktmask + i,
6598 qib_write_kreg(dd, kr_scratch, val);
6735 qib_write_kreg(dd, kr_hwdiagctrl, 0);
6787 qib_write_kreg(dd, regidx, pack_ent);
6789 qib_write_kreg(ppd->dd, kr_scratch, 0);
7137 qib_write_kreg(dd, KR_AHB_ACC, acc);
7156 qib_write_kreg(dd, KR_AHB_TRANS, trans);
7179 qib_write_kreg(dd, KR_AHB_TRANS, trans);
7194 qib_write_kreg(dd, KR_AHB_ACC, prev_acc);
7432 qib_write_kreg(dd, kr_r_access, val);
7473 qib_write_kreg(dd, kr_r_access, val);
7481 qib_write_kreg(dd, kr_r_access, val);
7499 qib_write_kreg(dd, kr_r_access, val);
7641 qib_write_kreg(dd, kr_control, dd->control |
7654 qib_write_kreg(dd, kr_fmask, 0ULL);
7659 qib_write_kreg(ppd->dd, kr_hwerrclear,
7663 qib_write_kreg(dd, kr_control, dd->control);