Lines Matching refs:x6
64 #define QIB_7322_Control_PCIECplQDiagEn_LSB 0x6
65 #define QIB_7322_Control_PCIECplQDiagEn_MSB 0x6
235 #define QIB_7322_IntMask_RcvAvail6IntMask_LSB 0x6
236 #define QIB_7322_IntMask_RcvAvail6IntMask_MSB 0x6
391 #define QIB_7322_IntStatus_RcvAvail6_LSB 0x6
392 #define QIB_7322_IntStatus_RcvAvail6_MSB 0x6
547 #define QIB_7322_IntClear_RcvAvail6IntClear_LSB 0x6
548 #define QIB_7322_IntClear_RcvAvail6IntClear_MSB 0x6
1072 #define QIB_7322_SendBufAvailAddr_SendBufAvailAddr_LSB 0x6
1468 #define QIB_7322_ErrMask_0_RcvShortPktLenErrMask_LSB 0x6
1469 #define QIB_7322_ErrMask_0_RcvShortPktLenErrMask_MSB 0x6
1588 #define QIB_7322_ErrStatus_0_RcvShortPktLenErr_LSB 0x6
1589 #define QIB_7322_ErrStatus_0_RcvShortPktLenErr_MSB 0x6
1708 #define QIB_7322_ErrClear_0_RcvShortPktLenErrClear_LSB 0x6
1709 #define QIB_7322_ErrClear_0_RcvShortPktLenErrClear_MSB 0x6
1744 #define QIB_7322_TXEStatus_0_LaFifoEmpty_VL6_LSB 0x6
1745 #define QIB_7322_TXEStatus_0_LaFifoEmpty_VL6_MSB 0x6
2101 #define QIB_7322_SendHdrErrSymptom_0_NonKeyPacket_LSB 0x6
2102 #define QIB_7322_SendHdrErrSymptom_0_NonKeyPacket_MSB 0x6
2336 #define QIB_7322_IBCCtrlB_0_IB_NUM_CHANNELS_MSB 0x6
2498 #define QIB_7322_IBSerdesCtrl_0_CMODE_MSB 0x6