Lines Matching refs:at91_twi_write
39 #define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
49 at91_twi_write(AT91_TWI_IDR, 0xffffffff); /* Disable all interrupts */
50 at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST); /* Reset peripheral */
51 at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */
69 at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
90 at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
95 at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
109 at91_twi_write(AT91_TWI_THR, *buf++);
112 at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
123 at91_twi_write(AT91_TWI_THR, *buf++);
127 at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
152 at91_twi_write(AT91_TWI_MMR, (pmsg->addr << 16)