Lines Matching refs:w83791d_write
210 static inline int w83791d_write(struct i2c_client *client, u8 reg, u8 value)
333 static int w83791d_write(struct i2c_client *client, u8 register, u8 value);
390 w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \
469 w83791d_write(client, W83791D_REG_BEEP_CTRL[bytenr],
542 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
620 w83791d_write(client, W83791D_REG_FAN_DIV[indx],
629 w83791d_write(client, W83791D_REG_VBAT,
635 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
719 w83791d_write(client, W83791D_REG_PWM[nr], data->pwm[nr]);
788 w83791d_write(client, W83791D_REG_FAN_CFG[reg_idx], reg_cfg_tmp);
829 w83791d_write(client, W83791D_REG_TEMP_TARGET[nr],
891 w83791d_write(client, W83791D_REG_TEMP_TOL[reg_idx],
926 w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]);
955 w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2],
957 w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2 + 1],
1051 w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff));
1080 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], val);
1225 w83791d_write(client, W83791D_REG_I2C_SUBADDR,
1291 w83791d_write(client, W83791D_REG_BANK, val1 | 0x80);
1420 w83791d_write(client, W83791D_REG_CONFIG, 0x80);
1424 w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80);
1428 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef);
1434 w83791d_write(client, W83791D_REG_TEMP2_CONFIG,
1440 w83791d_write(client, W83791D_REG_TEMP3_CONFIG,
1446 w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01);