Lines Matching refs:data
525 * ISA access is performed through an index/data register pair and needs to
527 * We use data->update_lock for this and need to ensure that we acquire it
531 static u8 dme1737_read(const struct dme1737_data *data, u8 reg)
533 struct i2c_client *client = data->client;
545 outb(reg, data->addr);
546 val = inb(data->addr + 1);
552 static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val)
554 struct i2c_client *client = data->client;
566 outb(reg, data->addr);
567 outb(val, data->addr + 1);
575 struct dme1737_data *data = dev_get_drvdata(dev);
579 mutex_lock(&data->update_lock);
582 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
583 dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data,
585 data->last_vbat = jiffies;
589 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
590 if (data->has_features & HAS_VID) {
591 data->vid = dme1737_read(data, DME1737_REG_VID) &
596 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
600 data->in[ix] = dme1737_read(data,
602 data->in_min[ix] = dme1737_read(data,
604 data->in_max[ix] = dme1737_read(data,
609 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
615 data->temp[ix] = dme1737_read(data,
617 data->temp_min[ix] = dme1737_read(data,
619 data->temp_max[ix] = dme1737_read(data,
621 if (data->has_features & HAS_TEMP_OFFSET) {
622 data->temp_offset[ix] = dme1737_read(data,
632 lsb[ix] = dme1737_read(data,
635 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
636 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
639 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
640 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
645 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
648 if (!(data->has_features & HAS_FAN(ix))) {
651 data->fan[ix] = dme1737_read(data,
653 data->fan[ix] |= dme1737_read(data,
655 data->fan_min[ix] = dme1737_read(data,
657 data->fan_min[ix] |= dme1737_read(data,
659 data->fan_opt[ix] = dme1737_read(data,
663 data->fan_max[ix - 4] = dme1737_read(data,
669 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
672 if (!(data->has_features & HAS_PWM(ix))) {
675 data->pwm[ix] = dme1737_read(data,
677 data->pwm_freq[ix] = dme1737_read(data,
681 data->pwm_config[ix] = dme1737_read(data,
683 data->pwm_min[ix] = dme1737_read(data,
687 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
688 data->pwm_rr[ix] = dme1737_read(data,
693 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
695 if ((ix == 2) && !(data->has_features & HAS_ZONE3)) {
699 if ((ix == 1) && (data->type == sch5127)) {
700 data->zone_low[1] = dme1737_read(data,
702 data->zone_abs[1] = dme1737_read(data,
705 data->zone_low[ix] = dme1737_read(data,
707 data->zone_abs[ix] = dme1737_read(data,
711 if (data->has_features & HAS_ZONE_HYST) {
712 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
713 data->zone_hyst[ix] = dme1737_read(data,
719 data->alarms = dme1737_read(data,
723 if (data->alarms & 0x80) {
724 data->alarms |= dme1737_read(data,
726 data->alarms |= dme1737_read(data,
733 if (!data->client) {
734 if (data->alarms & 0xff0000) {
735 dme1737_write(data, DME1737_REG_ALARM3,
738 if (data->alarms & 0xff00) {
739 dme1737_write(data, DME1737_REG_ALARM2,
742 if (data->alarms & 0xff) {
743 dme1737_write(data, DME1737_REG_ALARM1,
748 data->last_update = jiffies;
749 data->valid = 1;
752 mutex_unlock(&data->update_lock);
754 return data;
770 struct dme1737_data *data = dme1737_update_device(dev);
779 res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16);
782 res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8);
785 res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8);
788 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
801 struct dme1737_data *data = dev_get_drvdata(dev);
808 mutex_lock(&data->update_lock);
811 data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]);
812 dme1737_write(data, DME1737_REG_IN_MIN(ix),
813 data->in_min[ix]);
816 data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]);
817 dme1737_write(data, DME1737_REG_IN_MAX(ix),
818 data->in_max[ix]);
823 mutex_unlock(&data->update_lock);
843 struct dme1737_data *data = dme1737_update_device(dev);
852 res = TEMP_FROM_REG(data->temp[ix], 16);
855 res = TEMP_FROM_REG(data->temp_min[ix], 8);
858 res = TEMP_FROM_REG(data->temp_max[ix], 8);
861 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
864 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
867 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
880 struct dme1737_data *data = dev_get_drvdata(dev);
887 mutex_lock(&data->update_lock);
890 data->temp_min[ix] = TEMP_TO_REG(val);
891 dme1737_write(data, DME1737_REG_TEMP_MIN(ix),
892 data->temp_min[ix]);
895 data->temp_max[ix] = TEMP_TO_REG(val);
896 dme1737_write(data, DME1737_REG_TEMP_MAX(ix),
897 data->temp_max[ix]);
900 data->temp_offset[ix] = TEMP_TO_REG(val);
901 dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix),
902 data->temp_offset[ix]);
907 mutex_unlock(&data->update_lock);
926 struct dme1737_data *data = dme1737_update_device(dev);
936 if ((ix == 1) && (data->config2 & 0x02)) {
943 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
944 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
947 res = TEMP_FROM_REG(data->zone_low[ix], 8);
951 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
952 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
955 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
968 struct dme1737_data *data = dev_get_drvdata(dev);
975 mutex_lock(&data->update_lock);
979 data->zone_low[ix] = dme1737_read(data,
982 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(
983 TEMP_FROM_REG(data->zone_low[ix], 8) -
984 val, ix, dme1737_read(data,
986 dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2),
987 data->zone_hyst[ix == 2]);
990 data->zone_low[ix] = TEMP_TO_REG(val);
991 dme1737_write(data, DME1737_REG_ZONE_LOW(ix),
992 data->zone_low[ix]);
996 data->zone_low[ix] = dme1737_read(data,
1000 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val -
1001 TEMP_FROM_REG(data->zone_low[ix], 8),
1002 dme1737_read(data,
1004 dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
1005 data->pwm_freq[ix]);
1008 data->zone_abs[ix] = TEMP_TO_REG(val);
1009 dme1737_write(data, DME1737_REG_ZONE_ABS(ix),
1010 data->zone_abs[ix]);
1015 mutex_unlock(&data->update_lock);
1034 struct dme1737_data *data = dme1737_update_device(dev);
1043 res = FAN_FROM_REG(data->fan[ix],
1045 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1048 res = FAN_FROM_REG(data->fan_min[ix],
1050 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1054 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
1057 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
1061 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
1074 struct dme1737_data *data = dev_get_drvdata(dev);
1081 mutex_lock(&data->update_lock);
1085 data->fan_min[ix] = FAN_TO_REG(val, 0);
1088 data->fan_opt[ix] = dme1737_read(data,
1091 data->fan_min[ix] = FAN_TO_REG(val,
1092 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1094 dme1737_write(data, DME1737_REG_FAN_MIN(ix),
1095 data->fan_min[ix] & 0xff);
1096 dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1,
1097 data->fan_min[ix] >> 8);
1101 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
1102 dme1737_write(data, DME1737_REG_FAN_MAX(ix),
1103 data->fan_max[ix - 4]);
1114 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data,
1116 dme1737_write(data, DME1737_REG_FAN_OPT(ix),
1117 data->fan_opt[ix]);
1123 mutex_unlock(&data->update_lock);
1145 struct dme1737_data *data = dme1737_update_device(dev);
1154 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) {
1157 res = data->pwm[ix];
1161 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1167 res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1172 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1176 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1177 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1179 res = data->pwm_acz[ix];
1184 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) {
1185 res = data->pwm_min[ix];
1192 res = data->pwm_min[ix];
1212 struct dme1737_data *data = dev_get_drvdata(dev);
1219 mutex_lock(&data->update_lock);
1222 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255);
1223 dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]);
1226 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data,
1228 dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
1229 data->pwm_freq[ix]);
1241 data->pwm_config[ix] = dme1737_read(data,
1243 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1248 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1250 data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1251 data->pwm_config[ix]);
1253 data->pwm_rr[ix > 0] = dme1737_read(data,
1255 data->pwm_rr_en &= ~(1 << ix);
1256 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1257 data->pwm_rr_en |= (1 << ix);
1258 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1259 data->pwm_rr[ix > 0]);
1260 dme1737_write(data,
1262 data->pwm_rr[ix > 0]);
1272 data->pwm_config[ix] = PWM_EN_TO_REG(0,
1273 data->pwm_config[ix]);
1274 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1275 data->pwm_config[ix]);
1279 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1280 data->pwm_config[ix]);
1281 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1282 data->pwm_config[ix]);
1293 data->pwm_config[ix] = PWM_ACZ_TO_REG(
1294 data->pwm_acz[ix],
1295 data->pwm_config[ix]);
1296 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1297 data->pwm_config[ix]);
1299 if (data->pwm_rr_en & (1 << ix)) {
1300 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1301 dme1737_read(data,
1303 dme1737_write(data,
1305 data->pwm_rr[ix > 0]);
1313 data->pwm_config[ix] = dme1737_read(data,
1315 data->pwm_rr[ix > 0] = dme1737_read(data,
1319 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1320 data->pwm_rr[ix > 0]);
1324 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1325 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1326 data->pwm_rr[ix > 0]);
1328 dme1737_write(data, DME1737_REG_PWM_RR(ix > 0),
1329 data->pwm_rr[ix > 0]);
1342 data->pwm_config[ix] = dme1737_read(data,
1344 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1347 data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1348 data->pwm_config[ix]);
1349 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
1350 data->pwm_config[ix]);
1354 data->pwm_acz[ix] = val;
1360 data->pwm_min[ix] = dme1737_read(data,
1366 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1367 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1368 dme1737_read(data,
1371 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1372 dme1737_read(data,
1375 dme1737_write(data, DME1737_REG_PWM_RR(0),
1376 data->pwm_rr[0]);
1380 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255);
1381 dme1737_write(data, DME1737_REG_PWM_MIN(ix),
1382 data->pwm_min[ix]);
1388 mutex_unlock(&data->update_lock);
1401 struct dme1737_data *data = i2c_get_clientdata(client);
1403 return sprintf(buf, "%d\n", data->vrm);
1409 struct dme1737_data *data = dev_get_drvdata(dev);
1412 data->vrm = val;
1419 struct dme1737_data *data = dme1737_update_device(dev);
1421 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1427 struct dme1737_data *data = dev_get_drvdata(dev);
1429 return sprintf(buf, "%s\n", data->name);
1950 struct dme1737_data *data = dev_get_drvdata(dev);
1954 if (data->has_features & HAS_FAN(ix)) {
1961 if (data->has_features & HAS_PWM(ix)) {
1964 if ((data->has_features & HAS_PWM_MIN) && ix < 3) {
1971 if (data->has_features & HAS_TEMP_OFFSET) {
1974 if (data->has_features & HAS_VID) {
1977 if (data->has_features & HAS_ZONE3) {
1980 if (data->has_features & HAS_ZONE_HYST) {
1985 if (!data->client) {
1992 struct dme1737_data *data = dev_get_drvdata(dev);
1996 if (!data->client &&
2007 if ((data->has_features & HAS_TEMP_OFFSET) &&
2012 if ((data->has_features & HAS_VID) &&
2017 if ((data->has_features & HAS_ZONE3) &&
2022 if ((data->has_features & HAS_ZONE_HYST) &&
2030 if (data->has_features & HAS_FAN(ix)) {
2040 if (data->has_features & HAS_PWM(ix)) {
2045 if ((data->has_features & HAS_PWM_MIN) && ix < 3 &&
2055 if (data->config & 0x02) {
2064 if (data->has_features & HAS_TEMP_OFFSET) {
2068 if (data->has_features & HAS_ZONE3) {
2072 if (data->has_features & HAS_ZONE_HYST) {
2079 if (data->has_features & HAS_PWM(ix)) {
2083 if ((data->has_features & HAS_PWM_MIN) &&
2094 if ((data->has_features & HAS_PWM(ix)) &&
2095 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
2113 struct dme1737_data *data = dev_get_drvdata(dev);
2114 struct i2c_client *client = data->client;
2119 data->in_nominal = IN_NOMINAL(data->type);
2121 data->config = dme1737_read(data, DME1737_REG_CONFIG);
2123 if (!(data->config & 0x01)) {
2132 data->config |= 0x01;
2133 dme1737_write(data, DME1737_REG_CONFIG, data->config);
2136 if (!(data->config & 0x04)) {
2144 data->config2 = dme1737_read(data, DME1737_REG_CONFIG2);
2146 if (data->config2 & 0x04) {
2147 data->has_features |= HAS_FAN(2);
2154 data->has_features |= HAS_FAN(3) | HAS_PWM(2);
2161 if (dme1737_i2c_get_features(0x2e, data) &&
2162 dme1737_i2c_get_features(0x4e, data)) {
2169 data->has_features |= HAS_FAN(0) | HAS_FAN(1) | HAS_PWM(0) | HAS_PWM(1);
2172 switch (data->type) {
2174 data->has_features |= HAS_TEMP_OFFSET | HAS_VID | HAS_ZONE3 |
2178 data->has_features |= HAS_TEMP_OFFSET | HAS_ZONE3 |
2182 data->has_features |= HAS_ZONE3;
2185 data->has_features |= HAS_FAN(2) | HAS_PWM(2);
2193 (data->has_features & HAS_PWM(2)) ? "yes" : "no",
2194 (data->has_features & HAS_PWM(4)) ? "yes" : "no",
2195 (data->has_features & HAS_PWM(5)) ? "yes" : "no",
2196 (data->has_features & HAS_FAN(2)) ? "yes" : "no",
2197 (data->has_features & HAS_FAN(3)) ? "yes" : "no",
2198 (data->has_features & HAS_FAN(4)) ? "yes" : "no",
2199 (data->has_features & HAS_FAN(5)) ? "yes" : "no");
2201 reg = dme1737_read(data, DME1737_REG_TACH_PWM);
2221 if (!(data->config & 0x02)) {
2223 data->pwm_config[ix] = dme1737_read(data,
2225 if ((data->has_features & HAS_PWM(ix)) &&
2226 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
2229 data->pwm_config[ix] = PWM_EN_TO_REG(1,
2230 data->pwm_config[ix]);
2231 dme1737_write(data, DME1737_REG_PWM(ix), 0);
2232 dme1737_write(data,
2234 data->pwm_config[ix]);
2240 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
2241 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
2242 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
2245 if (data->has_features & HAS_VID) {
2246 data->vrm = vid_which_vrm();
2258 static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
2288 data->has_features |= HAS_FAN(5);
2291 data->has_features |= HAS_PWM(5);
2294 data->has_features |= HAS_FAN(4);
2297 data->has_features |= HAS_PWM(4);
2343 struct dme1737_data *data;
2347 data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL);
2348 if (!data) {
2353 i2c_set_clientdata(client, data);
2354 data->type = id->driver_data;
2355 data->client = client;
2356 data->name = client->name;
2357 mutex_init(&data->update_lock);
2372 data->hwmon_dev = hwmon_device_register(dev);
2373 if (IS_ERR(data->hwmon_dev)) {
2375 err = PTR_ERR(data->hwmon_dev);
2384 kfree(data);
2391 struct dme1737_data *data = i2c_get_clientdata(client);
2393 hwmon_device_unregister(data->hwmon_dev);
2396 kfree(data);
2450 /* Access to the hwmon registers is through an index/data register
2504 struct dme1737_data *data;
2517 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2522 data->addr = res->start;
2523 platform_set_drvdata(pdev, data);
2530 data->type = sch311x;
2533 data->type = sch5127;
2536 company = dme1737_read(data, DME1737_REG_COMPANY);
2537 device = dme1737_read(data, DME1737_REG_DEVICE);
2541 data->type = sch311x;
2544 data->type = sch5127;
2551 if (data->type == sch5127) {
2552 data->name = "sch5127";
2554 data->name = "sch311x";
2558 mutex_init(&data->update_lock);
2561 data->type == sch5127 ? "SCH5127" : "SCH311x", data->addr);
2576 data->hwmon_dev = hwmon_device_register(dev);
2577 if (IS_ERR(data->hwmon_dev)) {
2579 err = PTR_ERR(data->hwmon_dev);
2589 kfree(data);
2598 struct dme1737_data *data = platform_get_drvdata(pdev);
2600 hwmon_device_unregister(data->hwmon_dev);
2602 release_region(data->addr, DME1737_EXTENT);
2604 kfree(data);