Lines Matching defs:start_reg
931 unsigned start_reg, end_reg, reg;
1138 start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_START;
1139 end_reg = 4 * pkt->count + start_reg - 4;
1140 if ((start_reg < PACKET3_SET_CONFIG_REG_START) ||
1141 (start_reg >= PACKET3_SET_CONFIG_REG_END) ||
1147 reg = start_reg + (4 * i);
1154 start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_START;
1155 end_reg = 4 * pkt->count + start_reg - 4;
1156 if ((start_reg < PACKET3_SET_CONTEXT_REG_START) ||
1157 (start_reg >= PACKET3_SET_CONTEXT_REG_END) ||
1163 reg = start_reg + (4 * i);
1174 start_reg = (idx_value << 2) + PACKET3_SET_RESOURCE_START;
1175 end_reg = 4 * pkt->count + start_reg - 4;
1176 if ((start_reg < PACKET3_SET_RESOURCE_START) ||
1177 (start_reg >= PACKET3_SET_RESOURCE_END) ||
1241 start_reg = (idx_value << 2) + PACKET3_SET_BOOL_CONST_START;
1242 end_reg = 4 * pkt->count + start_reg - 4;
1243 if ((start_reg < PACKET3_SET_BOOL_CONST_START) ||
1244 (start_reg >= PACKET3_SET_BOOL_CONST_END) ||
1251 start_reg = (idx_value << 2) + PACKET3_SET_LOOP_CONST_START;
1252 end_reg = 4 * pkt->count + start_reg - 4;
1253 if ((start_reg < PACKET3_SET_LOOP_CONST_START) ||
1254 (start_reg >= PACKET3_SET_LOOP_CONST_END) ||
1261 start_reg = (idx_value << 2) + PACKET3_SET_CTL_CONST_START;
1262 end_reg = 4 * pkt->count + start_reg - 4;
1263 if ((start_reg < PACKET3_SET_CTL_CONST_START) ||
1264 (start_reg >= PACKET3_SET_CTL_CONST_END) ||
1275 start_reg = (idx_value << 2) + PACKET3_SET_SAMPLER_START;
1276 end_reg = 4 * pkt->count + start_reg - 4;
1277 if ((start_reg < PACKET3_SET_SAMPLER_START) ||
1278 (start_reg >= PACKET3_SET_SAMPLER_END) ||