Lines Matching defs:gpuobj
51 offset = chan->ramin->gpuobj->im_backing_start; \
125 * The main reason for creating a channel is so we can use the gpuobj
160 BAR0_WI32(chan->ramin->gpuobj, i, 0);
188 BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, lower_32_bits(v));
189 BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, upper_32_bits(v));
195 BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, 0x00000000);
196 BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000);
214 dev_priv->vm_vram_pt[i] = chan->vm_vram_pt[i]->gpuobj;
230 BAR0_WI32(priv->pramin_bar->gpuobj, 0x00, 0x7fc00000);
231 BAR0_WI32(priv->pramin_bar->gpuobj, 0x04, dev_priv->ramin_size - 1);
232 BAR0_WI32(priv->pramin_bar->gpuobj, 0x08, 0x00000000);
233 BAR0_WI32(priv->pramin_bar->gpuobj, 0x0c, 0x00000000);
234 BAR0_WI32(priv->pramin_bar->gpuobj, 0x10, 0x00000000);
235 BAR0_WI32(priv->pramin_bar->gpuobj, 0x14, 0x00000000);
242 BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000);
243 BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 +
245 BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000);
246 BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000);
247 BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000);
248 BAR0_WI32(priv->fb_bar->gpuobj, 0x14, 0x00000000);
333 struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
351 struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
375 nv50_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj,
380 if (gpuobj->im_backing)
388 true, false, &gpuobj->im_backing);
394 ret = nouveau_bo_pin(gpuobj->im_backing, TTM_PL_FLAG_VRAM);
397 nouveau_bo_ref(NULL, &gpuobj->im_backing);
401 gpuobj->im_backing_start = gpuobj->im_backing->bo.mem.mm_node->start;
402 gpuobj->im_backing_start <<= PAGE_SHIFT;
408 nv50_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
412 if (gpuobj && gpuobj->im_backing) {
413 if (gpuobj->im_bound)
414 dev_priv->engine.instmem.unbind(dev, gpuobj);
415 nouveau_bo_unpin(gpuobj->im_backing);
416 nouveau_bo_ref(NULL, &gpuobj->im_backing);
417 gpuobj->im_backing = NULL;
422 nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
426 struct nouveau_gpuobj *pramin_pt = priv->pramin_pt->gpuobj;
430 if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound)
434 gpuobj->im_pramin->start, gpuobj->im_pramin->size);
436 pte = (gpuobj->im_pramin->start >> 12) << 1;
437 pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;
438 vram = gpuobj->im_backing_start;
441 gpuobj->im_pramin->start, pte, pte_end);
442 NV_DEBUG(dev, "first vram page: 0x%08x\n", gpuobj->im_backing_start);
460 gpuobj->im_bound = 1;
465 nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
471 if (gpuobj->im_bound == 0)
474 pte = (gpuobj->im_pramin->start >> 12) << 1;
475 pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;
478 nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000);
479 nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000);
483 gpuobj->im_bound = 0;