Lines Matching defs:state
69 struct nv04_mode_state *state = &dev_priv->mode_reg;
75 state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
81 state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
90 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
98 struct nv04_crtc_reg *state = &dev_priv->mode_reg.crtc_reg[head];
100 state->tv_setup = 0;
103 state->CRTC[NV_CIO_CRE_LCD__INDEX] = 0;
104 state->CRTC[NV_CIO_CRE_49] |= 0x10;
106 state->CRTC[NV_CIO_CRE_49] &= ~0x10;
110 state->CRTC[NV_CIO_CRE_LCD__INDEX]);
112 state->CRTC[NV_CIO_CRE_49]);
114 state->tv_setup);