Lines Matching refs:dev_priv
46 struct drm_nouveau_private *dev_priv = dev->dev_private;
47 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
48 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
49 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
50 struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
77 struct drm_nouveau_private *dev_priv = dev->dev_private;
78 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
79 struct nouveau_tile_reg *tile = dev_priv->tile.reg, *found = NULL;
82 spin_lock(&dev_priv->tile.lock);
106 spin_unlock(&dev_priv->tile.lock);
131 struct drm_nouveau_private *dev_priv = dev->dev_private;
136 virt = ((virt - dev_priv->vm_vram_base) >> 16) << 1;
141 if (dev_priv->vram_sys_base) {
142 phys += dev_priv->vram_sys_base;
162 pgt = dev_priv->vm_vram_pt[virt >> 14];
177 dev_priv->engine.instmem.flush(dev);
189 struct drm_nouveau_private *dev_priv = dev->dev_private;
193 virt -= dev_priv->vm_vram_base;
197 pgt = dev_priv->vm_vram_pt[virt >> 29];
209 dev_priv->engine.instmem.flush(dev);
223 struct drm_nouveau_private *dev_priv = dev->dev_private;
225 nouveau_bo_unpin(dev_priv->vga_ram);
226 nouveau_bo_ref(NULL, &dev_priv->vga_ram);
228 ttm_bo_device_release(&dev_priv->ttm.bdev);
230 nouveau_ttm_global_release(dev_priv);
252 if (dev_priv->fb_mtrr) {
253 drm_mtrr_del(dev_priv->fb_mtrr,
256 dev_priv->fb_mtrr = -1;
285 struct drm_nouveau_private *dev_priv = dev->dev_private;
295 if (dev_priv->flags & NV_NFORCE) {
299 if (dev_priv->flags & NV_NFORCE2) {
312 struct drm_nouveau_private *dev_priv = dev->dev_private;
314 if (dev_priv->card_type == NV_04) {
315 dev_priv->vram_size = nouveau_mem_detect_nv04(dev);
317 if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) {
318 dev_priv->vram_size = nouveau_mem_detect_nforce(dev);
320 if (dev_priv->card_type < NV_50) {
321 dev_priv->vram_size = nv_rd32(dev, NV04_PFB_FIFO_DATA);
322 dev_priv->vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;
324 if (dev_priv->card_type < NV_C0) {
325 dev_priv->vram_size = nv_rd32(dev, NV04_PFB_FIFO_DATA);
326 dev_priv->vram_size |= (dev_priv->vram_size & 0xff) << 32;
327 dev_priv->vram_size &= 0xffffffff00ll;
328 if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) {
329 dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10);
330 dev_priv->vram_sys_base <<= 12;
333 dev_priv->vram_size = nv_rd32(dev, 0x10f20c) << 20;
334 dev_priv->vram_size *= nv_rd32(dev, 0x121c74);
337 NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20));
338 if (dev_priv->vram_sys_base) {
340 dev_priv->vram_sys_base);
343 if (dev_priv->vram_size)
399 struct drm_nouveau_private *dev_priv = dev->dev_private;
428 dev_priv->gart_info.type = NOUVEAU_GART_AGP;
429 dev_priv->gart_info.aper_base = info.aperture_base;
430 dev_priv->gart_info.aper_size = info.aperture_size;
438 struct drm_nouveau_private *dev_priv = dev->dev_private;
439 struct ttm_bo_device *bdev = &dev_priv->ttm.bdev;
442 dev_priv->fb_phys = pci_resource_start(dev->pdev, 1);
443 dev_priv->gart_info.type = NOUVEAU_GART_NONE;
445 if (dev_priv->card_type >= NV_50 &&
455 ret = nouveau_ttm_global_init(dev_priv);
459 ret = ttm_bo_device_init(&dev_priv->ttm.bdev,
460 dev_priv->ttm.bo_global_ref.ref.object,
468 spin_lock_init(&dev_priv->tile.lock);
470 dev_priv->fb_available_size = dev_priv->vram_size;
471 dev_priv->fb_mappable_pages = dev_priv->fb_available_size;
472 if (dev_priv->fb_mappable_pages > pci_resource_len(dev->pdev, 1))
473 dev_priv->fb_mappable_pages =
475 dev_priv->fb_mappable_pages >>= PAGE_SHIFT;
478 dev_priv->fb_available_size -= dev_priv->ramin_rsvd_vram;
479 dev_priv->fb_aper_free = dev_priv->fb_available_size;
483 dev_priv->fb_available_size >> PAGE_SHIFT);
490 0, 0, true, true, &dev_priv->vga_ram);
492 ret = nouveau_bo_pin(dev_priv->vga_ram, TTM_PL_FLAG_VRAM);
495 nouveau_bo_ref(NULL, &dev_priv->vga_ram);
507 if (dev_priv->gart_info.type == NOUVEAU_GART_NONE) {
516 (int)(dev_priv->gart_info.aper_size >> 20));
517 dev_priv->gart_info.aper_free = dev_priv->gart_info.aper_size;
520 dev_priv->gart_info.aper_size >> PAGE_SHIFT);
526 dev_priv->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 1),