Lines Matching refs:link_status
942 uint8_t link_status[DP_LINK_STATUS_SIZE])
948 link_status, DP_LINK_STATUS_SIZE);
955 intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE],
958 return link_status[r - DP_LANE0_1_STATUS];
962 intel_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE],
969 uint8_t l = intel_dp_link_status(link_status, i);
975 intel_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE],
982 uint8_t l = intel_dp_link_status(link_status, i);
1013 uint8_t link_status[DP_LINK_STATUS_SIZE],
1022 uint8_t this_v = intel_get_adjust_request_voltage(link_status, lane);
1023 uint8_t this_p = intel_get_adjust_request_pre_emphasis(link_status, lane);
1108 intel_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE],
1113 uint8_t l = intel_dp_link_status(link_status, i);
1120 intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
1126 lane_status = intel_get_lane_status(link_status, lane);
1138 intel_channel_eq_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count)
1144 lane_align = intel_dp_link_status(link_status,
1149 lane_status = intel_get_lane_status(link_status, lane);
1187 uint8_t link_status[DP_LINK_STATUS_SIZE];
1238 if (!intel_dp_get_link_status(intel_dp, link_status))
1241 if (intel_clock_recovery_ok(link_status, intel_dp->lane_count)) {
1263 intel_get_adjust_train(intel_dp, link_status, intel_dp->lane_count, train_set);
1292 if (!intel_dp_get_link_status(intel_dp, link_status))
1295 if (intel_channel_eq_ok(link_status, intel_dp->lane_count)) {
1305 intel_get_adjust_train(intel_dp, link_status, intel_dp->lane_count, train_set);
1366 uint8_t link_status[DP_LINK_STATUS_SIZE];
1371 if (!intel_dp_get_link_status(intel_dp, link_status)) {
1376 if (!intel_channel_eq_ok(link_status, intel_dp->lane_count))