Lines Matching refs:intel_crtc
1065 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1077 dev_priv->cfb_plane = intel_crtc->plane;
1144 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1145 int plane = (intel_crtc->plane == 0 ? DPFC_CTL_PLANEA :
1152 dev_priv->cfb_plane = intel_crtc->plane;
1171 DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
1201 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1202 int plane = (intel_crtc->plane == 0) ? DPFC_CTL_PLANEA :
1209 dev_priv->cfb_plane = intel_crtc->plane;
1231 DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
1313 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1314 int plane = intel_crtc->plane;
1461 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1465 int plane = intel_crtc->plane;
1539 intel_wait_for_vblank(dev, intel_crtc->pipe);
1551 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1555 int pipe = intel_crtc->pipe;
1556 int plane = intel_crtc->plane;
1660 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1661 int pipe = intel_crtc->pipe;
1681 temp |= (intel_crtc->fdi_lanes - 1) << 19;
1751 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1752 int pipe = intel_crtc->pipe;
1772 temp |= (intel_crtc->fdi_lanes - 1) << 19;
1862 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1863 int pipe = intel_crtc->pipe;
1864 int plane = intel_crtc->plane;
1916 temp |= (intel_crtc->fdi_lanes - 1) << 19;
2227 static void intel_crtc_dpms_overlay(struct intel_crtc *intel_crtc, bool enable)
2232 if (!enable && intel_crtc->overlay) {
2233 overlay = intel_crtc->overlay;
2262 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
2263 int pipe = intel_crtc->pipe;
2264 int plane = intel_crtc->plane;
2311 intel_crtc_dpms_overlay(intel_crtc, true);
2315 intel_crtc_dpms_overlay(intel_crtc, false);
2369 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
2370 int pipe = intel_crtc->pipe;
2373 if (intel_crtc->dpms_mode == mode)
2376 intel_crtc->dpms_mode = mode;
2377 intel_crtc->cursor_on = mode == DRM_MODE_DPMS_ON;
3278 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
3279 if (intel_crtc->dpms_mode == DRM_MODE_DPMS_ON) {
3280 if (intel_crtc->plane == 0)
3448 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
3449 if (intel_crtc->dpms_mode == DRM_MODE_DPMS_ON) {
3451 if (intel_crtc->plane == 0) {
3453 intel_crtc->pipe, crtc->mode.clock);
3457 intel_crtc->pipe, crtc->mode.clock);
3485 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
3486 int pipe = intel_crtc->pipe;
3487 int plane = intel_crtc->plane;
3490 int dpll_md_reg = (intel_crtc->pipe == 0) ? DPLL_A_MD : DPLL_B_MD;
3709 intel_crtc->fdi_lanes = lane;
3996 intel_crtc->lowfreq_avail = true;
4003 intel_crtc->lowfreq_avail = false;
4100 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4101 int palreg = (intel_crtc->pipe == 0) ? PALETTE_A : PALETTE_B;
4110 palreg = (intel_crtc->pipe == 0) ? LGC_PALETTE_A :
4115 (intel_crtc->lut_r[i] << 16) |
4116 (intel_crtc->lut_g[i] << 8) |
4117 intel_crtc->lut_b[i]);
4125 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4129 if (intel_crtc->cursor_visible == visible)
4147 intel_crtc->cursor_visible = visible;
4154 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4155 int pipe = intel_crtc->pipe;
4158 if (intel_crtc->cursor_visible != visible) {
4170 intel_crtc->cursor_visible = visible;
4181 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4182 int pipe = intel_crtc->pipe;
4183 int x = intel_crtc->cursor_x;
4184 int y = intel_crtc->cursor_y;
4190 if (intel_crtc->cursor_on && crtc->fb) {
4191 base = intel_crtc->cursor_addr;
4201 if (x + intel_crtc->cursor_width < 0)
4210 if (y + intel_crtc->cursor_height < 0)
4219 if (!visible && !intel_crtc->cursor_visible)
4239 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4293 (intel_crtc->pipe == 0) ? I915_GEM_PHYS_CURSOR_0 : I915_GEM_PHYS_CURSOR_1,
4306 if (intel_crtc->cursor_bo) {
4308 if (intel_crtc->cursor_bo != bo)
4309 i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo);
4311 i915_gem_object_unpin(intel_crtc->cursor_bo);
4312 drm_gem_object_unreference(intel_crtc->cursor_bo);
4317 intel_crtc->cursor_addr = addr;
4318 intel_crtc->cursor_bo = bo;
4319 intel_crtc->cursor_width = width;
4320 intel_crtc->cursor_height = height;
4336 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4338 intel_crtc->cursor_x = x;
4339 intel_crtc->cursor_y = y;
4350 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4352 intel_crtc->lut_r[regno] = red >> 8;
4353 intel_crtc->lut_g[regno] = green >> 8;
4354 intel_crtc->lut_b[regno] = blue >> 8;
4360 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4362 *red = intel_crtc->lut_r[regno] << 8;
4363 *green = intel_crtc->lut_g[regno] << 8;
4364 *blue = intel_crtc->lut_b[regno] << 8;
4371 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4374 intel_crtc->lut_r[i] = red[i] >> 8;
4375 intel_crtc->lut_g[i] = green[i] >> 8;
4376 intel_crtc->lut_b[i] = blue[i] >> 8;
4407 struct intel_crtc *intel_crtc;
4431 intel_crtc = to_intel_crtc(crtc);
4432 *dpms_mode = intel_crtc->dpms_mode;
4433 if (intel_crtc->dpms_mode != DRM_MODE_DPMS_ON) {
4465 intel_crtc = to_intel_crtc(crtc);
4466 *dpms_mode = intel_crtc->dpms_mode;
4473 if (intel_crtc->dpms_mode != DRM_MODE_DPMS_ON) {
4483 intel_wait_for_vblank(dev, intel_crtc->pipe);
4517 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4518 int pipe = intel_crtc->pipe;
4599 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4600 int pipe = intel_crtc->pipe;
4646 struct intel_crtc *intel_crtc = (struct intel_crtc *)arg;
4647 struct drm_crtc *crtc = &intel_crtc->base;
4652 intel_crtc->busy = false;
4661 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4662 int pipe = intel_crtc->pipe;
4693 mod_timer(&intel_crtc->idle_timer, jiffies +
4701 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4702 int pipe = intel_crtc->pipe;
4716 if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
4750 struct intel_crtc *intel_crtc;
4766 intel_crtc = to_intel_crtc(crtc);
4767 if (!intel_crtc->busy)
4794 struct intel_crtc *intel_crtc;
4817 intel_crtc = to_intel_crtc(crtc);
4820 if (!intel_crtc->busy) {
4831 intel_crtc->busy = true;
4834 mod_timer(&intel_crtc->idle_timer, jiffies +
4843 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4846 kfree(intel_crtc);
4866 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4874 if (intel_crtc == NULL)
4878 work = intel_crtc->unpin_work;
4884 intel_crtc->unpin_work = NULL;
4885 drm_vblank_put(dev, intel_crtc->pipe);
4890 e->event.sequence = drm_vblank_count(dev, intel_crtc->pipe);
4908 trace_i915_flip_complete(intel_crtc->plane, work->pending_flip_obj);
4930 struct intel_crtc *intel_crtc =
4935 if (intel_crtc->unpin_work) {
4936 if ((++intel_crtc->unpin_work->pending) > 1)
4953 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4956 int pipe = intel_crtc->pipe;
4972 if (intel_crtc->unpin_work) {
4979 intel_crtc->unpin_work = work;
4999 ret = drm_vblank_get(dev, intel_crtc->pipe);
5010 if (intel_crtc->plane)
5030 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
5038 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
5051 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
5062 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
5075 trace_i915_flip_request(intel_crtc->plane, obj);
5086 intel_crtc->unpin_work = NULL;
5118 struct intel_crtc *intel_crtc;
5121 intel_crtc = kzalloc(sizeof(struct intel_crtc) + (INTELFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
5122 if (intel_crtc == NULL)
5125 drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs);
5127 drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);
5128 intel_crtc->pipe = pipe;
5129 intel_crtc->plane = pipe;
5131 intel_crtc->lut_r[i] = i;
5132 intel_crtc->lut_g[i] = i;
5133 intel_crtc->lut_b[i] = i;
5137 intel_crtc->pipe = pipe;
5138 intel_crtc->plane = pipe;
5141 intel_crtc->plane = ((pipe == 0) ? 1 : 0);
5145 dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
5146 dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base;
5147 dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base;
5149 intel_crtc->cursor_addr = 0;
5150 intel_crtc->dpms_mode = -1;
5151 drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
5153 intel_crtc->busy = false;
5155 setup_timer(&intel_crtc->idle_timer, intel_crtc_idle_timer,
5156 (unsigned long)intel_crtc);
5165 struct intel_crtc *crtc;
5191 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
5192 if (intel_crtc->pipe == pipe)
6025 struct intel_crtc *intel_crtc;
6037 intel_crtc = to_intel_crtc(crtc);
6039 del_timer_sync(&intel_crtc->idle_timer);