Lines Matching defs:refclk
267 /* LVDS single-channel 120Mhz refclk */
279 /* LVDS dual-channel 120Mhz refclk */
291 /* LVDS single-channel 100Mhz refclk */
303 /* LVDS dual-channel 100Mhz refclk */
333 int target, int refclk, intel_clock_t *best_clock);
336 int target, int refclk, intel_clock_t *best_clock);
340 int target, int refclk, intel_clock_t *best_clock);
343 int target, int refclk, intel_clock_t *best_clock);
640 int refclk = 120;
644 refclk = 100;
649 if (refclk == 100)
654 if (refclk == 100)
724 static void pineview_clock(int refclk, intel_clock_t *clock)
728 clock->vco = refclk * clock->m / clock->n;
732 static void intel_clock(struct drm_device *dev, int refclk, intel_clock_t *clock)
735 pineview_clock(refclk, clock);
740 clock->vco = refclk * clock->m / (clock->n + 2);
765 * Returns whether the given set of divisors are valid for a given refclk with
798 int target, int refclk, intel_clock_t *best_clock)
841 intel_clock(dev, refclk, &clock);
861 int target, int refclk, intel_clock_t *best_clock)
904 intel_clock(dev, refclk, &clock);
923 int target, int refclk, intel_clock_t *best_clock)
945 intel_clock(dev, refclk, &clock);
953 int target, int refclk, intel_clock_t *best_clock)
3502 int refclk, num_connectors = 0;
3567 refclk = dev_priv->lvds_ssc_freq * 1000;
3569 refclk / 1000);
3571 refclk = 96000;
3573 refclk = 120000; /* 120Mhz refclk */
3575 refclk = 48000;
3581 * refclk, or FALSE. The returned values represent the clock equation:
3585 ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, &clock);
3598 refclk,