Lines Matching defs:m2
52 int m1, m2;
73 intel_range_t dot, vco, n, m, m1, m2, p, p1;
351 .m2 = { .min = I8XX_M2_MIN, .max = I8XX_M2_MAX },
365 .m2 = { .min = I8XX_M2_MIN, .max = I8XX_M2_MAX },
379 .m2 = { .min = I9XX_M2_MIN, .max = I9XX_M2_MAX },
393 .m2 = { .min = I9XX_M2_MIN, .max = I9XX_M2_MAX },
411 .m2 = { .min = G4X_M2_SDVO_MIN, .max = G4X_M2_SDVO_MAX },
427 .m2 = { .min = G4X_M2_HDMI_DAC_MIN, .max = G4X_M2_HDMI_DAC_MAX },
448 .m2 = { .min = G4X_M2_SINGLE_CHANNEL_LVDS_MIN,
472 .m2 = { .min = G4X_M2_DUAL_CHANNEL_LVDS_MIN,
496 .m2 = { .min = G4X_M2_DISPLAY_PORT_MIN,
514 .m2 = { .min = PINEVIEW_M2_MIN, .max = PINEVIEW_M2_MAX },
528 .m2 = { .min = PINEVIEW_M2_MIN, .max = PINEVIEW_M2_MAX },
543 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
558 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
573 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
588 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
603 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
623 .m2 = { .min = IRONLAKE_M2_MIN,
726 clock->m = clock->m2 + 2;
738 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
778 if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)
779 INTELPllInvalid ("m2 out of range\n");
782 if (clock->m1 <= clock->m2 && !IS_PINEVIEW(dev))
783 INTELPllInvalid ("m1 <= m2\n");
830 for (clock.m2 = limit->m2.min;
831 clock.m2 <= limit->m2.max; clock.m2++) {
833 if (clock.m2 >= clock.m1 && !IS_PINEVIEW(dev))
895 /* based on hardware requirement, prefere larger m1,m2 */
898 for (clock.m2 = limit->m2.max;
899 clock.m2 >= limit->m2.min; clock.m2--) {
937 clock.m2 = 9;
943 clock.m2 = 8;
961 clock.m2 = 8;
967 clock.m2 = 2;
969 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2);
3582 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
3621 clock.m2 = 8;
3628 clock.m2 = 8;
3755 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
3758 reduced_clock.m1 << 8 | reduced_clock.m2;
3760 fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
3763 reduced_clock.m2;
4531 clock.m2 = (fp & FP_M2_PINEVIEW_DIV_MASK) >> FP_M2_DIV_SHIFT;
4534 clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;