Lines Matching refs:iir
317 /* disable master interrupt before clearing iir */
942 u32 iir, new_iir;
956 iir = I915_READ(IIR);
964 irq_received = iir != 0;
966 /* Can't rely on pipestat interrupt bit in iir as it might
968 * It doesn't set the bit in iir again, but it still produces
975 if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
1003 (iir & I915_DISPLAY_PORT_INTERRUPT)) {
1016 I915_WRITE(IIR, iir);
1026 if (iir & I915_USER_INTERRUPT) {
1036 if (HAS_BSD(dev) && (iir & I915_BSD_USER_INTERRUPT))
1039 if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) {
1045 if (iir & I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) {
1071 (iir & I915_ASLE_INTERRUPT))
1074 /* With MSI, interrupts are only generated when iir
1076 * set while we were handling the existing iir bits, then
1089 iir = new_iir;